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author | Matt Ettus <matt@ettus.com> | 2011-10-12 15:20:48 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2011-10-26 15:57:22 -0700 |
commit | 406345b14c745c0c3e7ac7c47ce6e893c61e357e (patch) | |
tree | 75c215a345b7366ef17ddb1e0b8ac3c88e3afb92 /usrp2/control_lib | |
parent | 550e32bd1ef550a7b90e9aec4baa6a10fb247176 (diff) | |
download | uhd-406345b14c745c0c3e7ac7c47ce6e893c61e357e.tar.gz uhd-406345b14c745c0c3e7ac7c47ce6e893c61e357e.tar.bz2 uhd-406345b14c745c0c3e7ac7c47ce6e893c61e357e.zip |
dsp_engine fix rst -> reset, default to read address
Diffstat (limited to 'usrp2/control_lib')
-rw-r--r-- | usrp2/control_lib/double_buffer.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/control_lib/double_buffer.v b/usrp2/control_lib/double_buffer.v index e8e565963..8865bddee 100644 --- a/usrp2/control_lib/double_buffer.v +++ b/usrp2/control_lib/double_buffer.v @@ -51,8 +51,8 @@ module double_buffer reg [BUF_SIZE-1:0] len0, len1; assign data_o = read_ptr ? data_o_1 : data_o_0; - assign rw0_adr = (read_ok & ~read_ptr) ? read_adr : write_adr; - assign rw1_adr = (read_ok & read_ptr) ? read_adr : write_adr; + assign rw0_adr = (write_ok & ~write_ptr) ? write_adr : read_adr; + assign rw1_adr = (write_ok & write_ptr) ? write_adr : read_adr; wire [35:0] access_dat_o_0, access_dat_o_1; wire access_ptr; |