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authorJosh Blum <josh@joshknows.com>2012-04-10 19:10:10 -0700
committerJosh Blum <josh@joshknows.com>2012-04-10 19:10:10 -0700
commite8dc93363a60ad94b4777a5a8d64424c1273ed3e (patch)
treef5885cf35b25e4012fc5e397398ad3b16e9d3f7f /usrp2/control_lib
parent510632d8968eb95d383da4cf2d72184d66da0bee (diff)
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usrp: work on meeting timing constraints
* fifo ctrl register the vita ticks and use late * vita de/framer make nchans const since we dont change it * simplify readback muxes to minimal usage
Diffstat (limited to 'usrp2/control_lib')
-rw-r--r--usrp2/control_lib/settings_fifo_ctrl.v12
1 files changed, 7 insertions, 5 deletions
diff --git a/usrp2/control_lib/settings_fifo_ctrl.v b/usrp2/control_lib/settings_fifo_ctrl.v
index 160112169..3aa6b7ec7 100644
--- a/usrp2/control_lib/settings_fifo_ctrl.v
+++ b/usrp2/control_lib/settings_fifo_ctrl.v
@@ -238,20 +238,22 @@ module settings_fifo_ctrl
reg [31:0] command_hdr_reg;
reg [31:0] command_data_reg;
- wire now, early, late, too_early;
+ reg [63:0] vita_time_reg;
+ always @(posedge clock)
+ vita_time_reg <= vita_time;
+
+ wire late;
`ifndef FIFO_CTRL_NO_TIME
time_compare time_compare(
- .time_now(vita_time), .trigger_time(command_ticks_reg),
- .now(now), .early(early), .late(late), .too_early(too_early));
+ .time_now(vita_time_reg), .trigger_time(command_ticks_reg), .late(late));
`else
- assign now = 0;
assign late = 1;
`endif
//action occurs in the event state and when there is fifo space (should always be true)
//the third condition is that all peripherals in the perfs signal are ready/active high
//the fourth condition is that is an event time has been set, action is delayed until that time
- wire time_ready = (out_command_has_time)? (now || late) : 1;
+ wire time_ready = (out_command_has_time)? late : 1;
wire action = (cmd_state == EVENT_CMD) && ~result_fifo_full && perfs_ready && time_ready;
assign command_fifo_read = action;