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author | Josh Blum <josh@joshknows.com> | 2011-09-14 21:54:08 -0400 |
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committer | Josh Blum <josh@joshknows.com> | 2011-09-28 13:19:35 -0700 |
commit | 24b07e1b0dbe8ab9d72c46f65c14c34e84347554 (patch) | |
tree | 4c8e99d2ed6f79a63b8a7969dea8a1377ed99942 /usrp1/sdr_lib/rx_buffer.v | |
parent | a08af5a91e45fcb721d9aca54cdc05673e8d63e2 (diff) | |
download | uhd-24b07e1b0dbe8ab9d72c46f65c14c34e84347554.tar.gz uhd-24b07e1b0dbe8ab9d72c46f65c14c34e84347554.tar.bz2 uhd-24b07e1b0dbe8ab9d72c46f65c14c34e84347554.zip |
usrp1: copy regs files into common and fix include paths
Diffstat (limited to 'usrp1/sdr_lib/rx_buffer.v')
-rw-r--r-- | usrp1/sdr_lib/rx_buffer.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp1/sdr_lib/rx_buffer.v b/usrp1/sdr_lib/rx_buffer.v index d17294b98..5541d2912 100644 --- a/usrp1/sdr_lib/rx_buffer.v +++ b/usrp1/sdr_lib/rx_buffer.v @@ -22,8 +22,8 @@ // Interface to Cypress FX2 bus // A packet is 512 Bytes, the fifo has 4096 lines of 18 bits each -`include "../../firmware/include/fpga_regs_common.v" -`include "../../firmware/include/fpga_regs_standard.v" +`include "../common/fpga_regs_common.v" +`include "../common/fpga_regs_standard.v" module rx_buffer ( // Read/USB side |