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author | Josh Blum <josh@joshknows.com> | 2010-01-22 11:58:32 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2010-01-22 11:58:32 -0800 |
commit | da57b53f803af2598a06fa89e6da2797e5e65155 (patch) | |
tree | bfc0772d0cb7d880d1f91ed936baa02d8ac8d155 /usrp1/sdr_lib/hb/mult.v | |
parent | 7bf8a6df381a667134b55701993c6770d32bc76b (diff) | |
parent | a170b9b42345794429486dd4f3316e84ea2cc871 (diff) | |
download | uhd-da57b53f803af2598a06fa89e6da2797e5e65155.tar.gz uhd-da57b53f803af2598a06fa89e6da2797e5e65155.tar.bz2 uhd-da57b53f803af2598a06fa89e6da2797e5e65155.zip |
Merge branch 'usrp1' into usrp2
Conflicts:
.gitignore
Diffstat (limited to 'usrp1/sdr_lib/hb/mult.v')
-rw-r--r-- | usrp1/sdr_lib/hb/mult.v | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/usrp1/sdr_lib/hb/mult.v b/usrp1/sdr_lib/hb/mult.v new file mode 100644 index 000000000..a8d4cb1b7 --- /dev/null +++ b/usrp1/sdr_lib/hb/mult.v @@ -0,0 +1,16 @@ + + +module mult (input clock, input signed [15:0] x, input signed [15:0] y, output reg signed [30:0] product, + input enable_in, output reg enable_out ); + + always @(posedge clock) + if(enable_in) + product <= #1 x*y; + else + product <= #1 31'd0; + + always @(posedge clock) + enable_out <= #1 enable_in; + +endmodule // mult + |