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| author | Matt Ettus <matt@ettus.com> | 2009-09-03 21:39:48 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2009-09-03 21:39:48 -0700 |
| commit | f6548b5f7b6724e822ad3a6af32dc0910332f13d (patch) | |
| tree | 0e56821ac7badcd412af06da4efda7a7c31a83da /top | |
| parent | 5ce99ee61bad4f9c421a873aa2f3144e8e2aebe7 (diff) | |
| download | uhd-f6548b5f7b6724e822ad3a6af32dc0910332f13d.tar.gz uhd-f6548b5f7b6724e822ad3a6af32dc0910332f13d.tar.bz2 uhd-f6548b5f7b6724e822ad3a6af32dc0910332f13d.zip | |
seems to build a decent fpga, but still some issues with a full connection.
Diffstat (limited to 'top')
| -rwxr-xr-x | top/u2_core/u2_core.v | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/top/u2_core/u2_core.v b/top/u2_core/u2_core.v index 7fc2ce83b..a6596eb90 100755 --- a/top/u2_core/u2_core.v +++ b/top/u2_core/u2_core.v @@ -588,7 +588,7 @@ module u2_core // /////////////////////////////////////////////////////////////////////////////////// // SERDES - +/* serdes #(.TXFIFOSIZE(9),.RXFIFOSIZE(9)) serdes (.clk(dsp_clk),.rst(dsp_rst), .ser_tx_clk(ser_tx_clk),.ser_t(ser_t),.ser_tklsb(ser_tklsb),.ser_tkmsb(ser_tkmsb), @@ -598,7 +598,7 @@ module u2_core .tx_occupied(ser_tx_occ),.tx_full(ser_tx_full),.tx_empty(ser_tx_empty), .rx_occupied(ser_rx_occ),.rx_full(ser_rx_full),.rx_empty(ser_rx_empty), .serdes_link_up(serdes_link_up),.debug0(debug_serdes0), .debug1(debug_serdes1) ); - +*/ // /////////////////////////////////////////////////////////////////////////////////// // External RAM Interface @@ -659,7 +659,7 @@ module u2_core eth_mac_debug <= { { 6'd0, GMII_TX_EN, GMII_RX_DV, debug_mac0[7:0]}, {eth_rx_full2, eth_rx_empty2, eth_rx_occ2[13:0]} }; - assign debug_clk[0] = wb_clk; + assign debug_clk[0] = 0; // wb_clk; assign debug_clk[1] = clk_to_mac; /* |