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author | Matt Ettus <matt@ettus.com> | 2009-10-01 00:21:24 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2009-10-01 00:21:24 -0700 |
commit | 0a0655b56b84aa6557cdfaece206d0f5cf6ebeac (patch) | |
tree | 355546561a3484426c20de7482560a01ff5f913e /top/single_u2_sim | |
parent | ac31c35bea6cad3cca5ac3d45d86a91d07e80dd8 (diff) | |
download | uhd-0a0655b56b84aa6557cdfaece206d0f5cf6ebeac.tar.gz uhd-0a0655b56b84aa6557cdfaece206d0f5cf6ebeac.tar.bz2 uhd-0a0655b56b84aa6557cdfaece206d0f5cf6ebeac.zip |
fullchip sim now compiles again, after moving eth and models over to new simple_gemac
Diffstat (limited to 'top/single_u2_sim')
-rw-r--r-- | top/single_u2_sim/single_u2_sim.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/top/single_u2_sim/single_u2_sim.v b/top/single_u2_sim/single_u2_sim.v index 016815ff7..2a7b24849 100644 --- a/top/single_u2_sim/single_u2_sim.v +++ b/top/single_u2_sim/single_u2_sim.v @@ -178,7 +178,7 @@ module single_u2_sim(); .adc_b(adc_b),.adc_ovf_b(adc_ovf_b),.adc_on_b(adc_on_b),.adc_oe_b(adc_oe_b) ); wire [2:0] speed; - Phy_sim phy_model + phy_sim phy_model (.Gtx_clk(GMII_GTX_CLK), . Rx_clk(GMII_RX_CLK), .Tx_clk(GMII_TX_CLK), .Tx_er(GMII_TX_ER), .Tx_en(GMII_TX_EN), .Txd(GMII_TXD), .Rx_er(GMII_RX_ER), .Rx_dv(GMII_RX_DV), .Rxd(GMII_RXD), |