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authorjcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5>2008-09-08 01:00:12 +0000
committerjcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5>2008-09-08 01:00:12 +0000
commit61f2f0214c5999ea42a368a4fc99f03d8eb28d1e (patch)
treee7e24a9adc05ff1422fe3ada9926a51634741b47 /timing/time_transfer_tb.v
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Merged r9433:9527 from features/gr-usrp2 into trunk. Adds usrp2 and gr-usrp2 top-level components. Trunk passes distcheck with mb-gcc installed, but currently not without them. The key issue is that when mb-gcc is not installed, the build system skips over the usrp2/firmware directory, and the firmware include files don't get put into the dist tarball. But we can't do the usual DIST_SUBDIRS method as the firmware is a subpackage.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9528 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'timing/time_transfer_tb.v')
-rw-r--r--timing/time_transfer_tb.v50
1 files changed, 50 insertions, 0 deletions
diff --git a/timing/time_transfer_tb.v b/timing/time_transfer_tb.v
new file mode 100644
index 000000000..2b75c60bd
--- /dev/null
+++ b/timing/time_transfer_tb.v
@@ -0,0 +1,50 @@
+
+`timescale 1ns / 1ps
+
+module time_transfer_tb();
+
+ reg clk = 0, rst = 1;
+ always #5 clk = ~clk;
+
+ initial
+ begin
+ @(negedge clk);
+ @(negedge clk);
+ rst <= 0;
+ end
+
+ initial $dumpfile("time_transfer_tb.vcd");
+ initial $dumpvars(0,time_transfer_tb);
+
+ initial #100000000 $finish;
+
+ wire exp_pps, pps, pps_rcv;
+ wire [31:0] master_clock_rcv;
+ reg [31:0] master_clock = 0;
+ reg [31:0] counter = 0;
+
+ localparam PPS_PERIOD = 109;
+ always @(posedge clk)
+ if(counter == PPS_PERIOD)
+ counter <= 0;
+ else
+ counter <= counter + 1;
+ assign pps = (counter == (PPS_PERIOD-1));
+
+ always @(posedge clk)
+ master_clock <= master_clock + 1;
+
+ time_sender time_sender
+ (.clk(clk),.rst(rst),
+ .master_clock(master_clock),
+ .pps(pps),
+ .exp_pps_out(exp_pps) );
+
+ time_receiver time_receiver
+ (.clk(clk),.rst(rst),
+ .master_clock(master_clock_rcv),
+ .pps(pps_rcv),
+ .exp_pps_in(exp_pps) );
+
+ wire [31:0] delta = master_clock - master_clock_rcv;
+endmodule // time_transfer_tb