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| author | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-09-08 01:00:12 +0000 |
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| committer | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-09-08 01:00:12 +0000 |
| commit | 61f2f0214c5999ea42a368a4fc99f03d8eb28d1e (patch) | |
| tree | e7e24a9adc05ff1422fe3ada9926a51634741b47 /testbench/SERDES.sav | |
| download | uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.tar.gz uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.tar.bz2 uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.zip | |
Merged r9433:9527 from features/gr-usrp2 into trunk. Adds usrp2 and gr-usrp2 top-level components. Trunk passes distcheck with mb-gcc installed, but currently not without them. The key issue is that when mb-gcc is not installed, the build system skips over the usrp2/firmware directory, and the firmware include files don't get put into the dist tarball. But we can't do the usual DIST_SUBDIRS method as the firmware is a subpackage.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9528 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'testbench/SERDES.sav')
| -rw-r--r-- | testbench/SERDES.sav | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/testbench/SERDES.sav b/testbench/SERDES.sav new file mode 100644 index 000000000..3bb6ba929 --- /dev/null +++ b/testbench/SERDES.sav @@ -0,0 +1,35 @@ +[size] 1400 967 +[pos] -1 -1 +*-30.885946 6591910000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +[treeopen] u2_sim_top. +[treeopen] u2_sim_top.u2_basic. +[treeopen] u2_sim_top.u2_basic.serdes. +@22 +u2_sim_top.u2_basic.serdes.ser_t[15:0] +@28 +u2_sim_top.u2_basic.serdes.ser_tklsb +u2_sim_top.u2_basic.serdes.ser_tkmsb +u2_sim_top.u2_basic.ram_loader.ram_loader_done_o +u2_sim_top.u2_basic.proc_int +@22 +u2_sim_top.u2_basic.serdes.fifo_space[15:0] +@28 +u2_sim_top.u2_basic.serdes.inhibit_tx +u2_sim_top.u2_basic.serdes.send_xoff +u2_sim_top.u2_basic.serdes.send_xon +u2_sim_top.u2_basic.serdes.sent +u2_sim_top.u2_basic.serdes.xoff_rcvd +u2_sim_top.u2_basic.serdes.xon_rcvd +u2_sim_top.u2_basic.serdes.serdes_rx.wr_write_o +u2_sim_top.u2_basic.serdes.serdes_rx.wr_done_o +u2_sim_top.u2_basic.serdes.serdes_rx.write +@22 +u2_sim_top.u2_basic.serdes.serdes_rx.line_i[31:0] +@28 +(0)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] +(1)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] +@22 +#chosen_data[15:0] (2)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (3)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (4)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (5)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (6)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (7)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (8)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (9)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (10)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (11)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (12)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (13)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (14)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (15)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (16)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (17)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] +u2_sim_top.u2_basic.serdes.ser_t[15:0] +@28 +u2_sim_top.u2_basic.serdes.ser_tklsb |