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authorMatt Ettus <matt@ettus.com>2009-09-10 22:04:07 -0700
committerMatt Ettus <matt@ettus.com>2009-12-21 16:50:35 -0800
commita20bd4d33884d7d807facaff5b33a3785202c2aa (patch)
tree7f44edaa6ac514c6906882346b311a9ae11d0e90 /simple_gemac/simple_gemac_wrapper19.build
parent8f2c33eab9396185df259639082b7d1618585973 (diff)
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19 bit wide interface in prep for connection to UDP/IP state machines.
TX side done, not rx yet. Not tested, but it does compile.
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+iverilog -Wimplict -Wportbind -y ../control_lib/newfifo/ -y ../models/ -y . -y miim -y ../coregen/ -y ../control_lib/ -o simple_gemac_wrapper19_tb simple_gemac_wrapper19_tb.v