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authorAndrew Lynch <andrew.lynch@ni.com>2020-01-28 15:17:10 -0800
committerAaron Rossetto <aaron.rossetto@ni.com>2020-07-16 10:00:12 -0500
commiteadbc21982d6a12bc52300e6855af368b7917574 (patch)
tree55e871cdadde3699366fcfe1ece2895c9b9a8ffa /mpm
parent40b563387b0af059a2d565d4cba958cf5e0772fb (diff)
downloaduhd-eadbc21982d6a12bc52300e6855af368b7917574.tar.gz
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mpm: Add support for internal Ethernet interface
Diffstat (limited to 'mpm')
-rw-r--r--mpm/python/usrp_mpm/ethdispatch.py47
-rw-r--r--mpm/python/usrp_mpm/periph_manager/e320.py1
-rw-r--r--mpm/python/usrp_mpm/periph_manager/n3xx.py5
-rw-r--r--mpm/python/usrp_mpm/xports/xportmgr_udp.py5
4 files changed, 46 insertions, 12 deletions
diff --git a/mpm/python/usrp_mpm/ethdispatch.py b/mpm/python/usrp_mpm/ethdispatch.py
index 7c7437225..32c4e1cef 100644
--- a/mpm/python/usrp_mpm/ethdispatch.py
+++ b/mpm/python/usrp_mpm/ethdispatch.py
@@ -23,11 +23,11 @@ class EthDispatcherCtrl(object):
ETH_IP_OFFSET = 0x0000
ETH_PORT_OFFSET = 0x0004
FORWARD_ETH_BCAST_OFFSET = 0x0008
- BRIDGE_MAC_LO_OFFSET = 0x0010
- BRIDGE_MAC_HI_OFFSET = 0x0014
- BRIDGE_IP_OFFSET = 0x0018
- BRIDGE_PORT_OFFSET = 0x001c
- BRIDGE_ENABLE_OFFSET = 0x0020
+ BRIDGE_INTERNAL_MAC_LO_OFFSET = 0x0010
+ BRIDGE_INTERNAL_MAC_HI_OFFSET = 0x0014
+ BRIDGE_INTERNAL_IP_OFFSET = 0x0018
+ BRIDGE_INTERNAL_PORT_OFFSET = 0x001c
+ BRIDGE_INTERNAL_ENABLE_OFFSET = 0x0020
def __init__(self, label):
@@ -41,7 +41,7 @@ class EthDispatcherCtrl(object):
self.log.trace("Bridge Mode {}".format(
"Enabled" if bridge_mode else "Disabled"
))
- self.poke32(self.BRIDGE_ENABLE_OFFSET, int(bridge_mode))
+ self.poke32(self.BRIDGE_INTERNAL_ENABLE_OFFSET, int(bridge_mode))
def set_bridge_mac_addr(self, mac_addr):
"""
@@ -51,13 +51,13 @@ class EthDispatcherCtrl(object):
self.log.debug("Setting bridge MAC address to `{}'".format(mac_addr))
mac_addr_int = int(netaddr.EUI(mac_addr))
self.log.trace("Writing to address 0x{:04X}: 0x{:04X}".format(
- self.BRIDGE_MAC_LO_OFFSET, mac_addr_int & 0xFFFFFFFF
+ self.BRIDGE_INTERNAL_MAC_LO_OFFSET, mac_addr_int & 0xFFFFFFFF
))
- self.poke32(self.BRIDGE_MAC_LO_OFFSET, mac_addr_int & 0xFFFFFFFF)
+ self.poke32(self.BRIDGE_INTERNAL_MAC_LO_OFFSET, mac_addr_int & 0xFFFFFFFF)
self.log.trace("Writing to address 0x{:04X}: 0x{:04X}".format(
- self.BRIDGE_MAC_HI_OFFSET, mac_addr_int >> 32
+ self.BRIDGE_INTERNAL_MAC_HI_OFFSET, mac_addr_int >> 32
))
- self.poke32(self.BRIDGE_MAC_HI_OFFSET, mac_addr_int >> 32)
+ self.poke32(self.BRIDGE_INTERNAL_MAC_HI_OFFSET, mac_addr_int >> 32)
def set_ipv4_addr(self, ip_addr, bridge_en=False):
"""
@@ -65,7 +65,7 @@ class EthDispatcherCtrl(object):
Outgoing packets will have this IP address.
"""
if bridge_en:
- own_ip_offset = self.BRIDGE_IP_OFFSET
+ own_ip_offset = self.BRIDGE_INTERNAL_IP_OFFSET
else:
own_ip_offset = self.ETH_IP_OFFSET
self.log.debug("Setting my own IP address to `{}'".format(ip_addr))
@@ -82,7 +82,7 @@ class EthDispatcherCtrl(object):
port_value = port_value or self.DEFAULT_VITA_PORT[port_idx]
assert port_idx in (0,) #FIXME: Fix port_idx = 1
if bridge_en:
- port_reg_addr = self.BRIDGE_PORT_OFFSET
+ port_reg_addr = self.BRIDGE_INTERNAL_PORT_OFFSET
else:
port_reg_addr = self.ETH_PORT_OFFSET
with self._regs:
@@ -100,3 +100,26 @@ class EthDispatcherCtrl(object):
))
with self._regs:
self.poke32(self.FORWARD_ETH_BCAST_OFFSET, reg_value)
+
+ def setup_internal_interface(self, mac_addr, ip_addr):
+ """
+ Set up the FPGA side of the internal interface
+ """
+ with self._regs:
+ self.log.debug("Setting internal MAC address to `{}'".format(mac_addr))
+ mac_addr_int = int(netaddr.EUI(mac_addr))
+ mac_addr_low = mac_addr_int & 0xFFFFFFFF
+ mac_addr_hi = mac_addr_int >> 32
+ self.log.trace("Writing to address 0x{:04X}: 0x{:04X}".format(
+ self.BRIDGE_INTERNAL_MAC_LO_OFFSET, mac_addr_low
+ ))
+ self.poke32(self.BRIDGE_INTERNAL_MAC_LO_OFFSET, mac_addr_low)
+ self.log.trace("Writing to address 0x{:04X}: 0x{:04X}".format(
+ self.BRIDGE_INTERNAL_MAC_HI_OFFSET, mac_addr_hi
+ ))
+ self.poke32(self.BRIDGE_INTERNAL_MAC_HI_OFFSET, mac_addr_hi)
+ self.log.debug("Setting internal IP address to `{}'".format(ip_addr))
+ ip_addr_int = int(netaddr.IPAddress(ip_addr))
+ self.poke32(self.BRIDGE_INTERNAL_IP_OFFSET, ip_addr_int)
+ self.log.debug("Setting internal Mode")
+ self.poke32(self.BRIDGE_INTERNAL_ENABLE_OFFSET, int(True))
diff --git a/mpm/python/usrp_mpm/periph_manager/e320.py b/mpm/python/usrp_mpm/periph_manager/e320.py
index 0343f7755..00479185b 100644
--- a/mpm/python/usrp_mpm/periph_manager/e320.py
+++ b/mpm/python/usrp_mpm/periph_manager/e320.py
@@ -50,6 +50,7 @@ class E320XportMgrUDP(XportMgrUDP):
iface_config = {
'sfp0': {
'label': 'misc-enet-regs',
+ 'type': 'sfp',
}
}
diff --git a/mpm/python/usrp_mpm/periph_manager/n3xx.py b/mpm/python/usrp_mpm/periph_manager/n3xx.py
index ea6274af8..895e561b7 100644
--- a/mpm/python/usrp_mpm/periph_manager/n3xx.py
+++ b/mpm/python/usrp_mpm/periph_manager/n3xx.py
@@ -62,18 +62,23 @@ class N3xxXportMgrUDP(XportMgrUDP):
iface_config = {
'bridge0': {
'label': 'misc-enet-regs0',
+ 'type': 'bridge',
},
'sfp0': {
'label': 'misc-enet-regs0',
+ 'type': 'sfp',
},
'sfp1': {
'label': 'misc-enet-regs1',
+ 'type': 'sfp',
},
'eth1': {
'label': 'misc-enet-regs0',
+ 'type': 'sfp',
},
'eth2': {
'label': 'misc-enet-regs1',
+ 'type': 'sfp',
},
}
bridges = {'bridge0': ['sfp0', 'sfp1', 'bridge0']}
diff --git a/mpm/python/usrp_mpm/xports/xportmgr_udp.py b/mpm/python/usrp_mpm/xports/xportmgr_udp.py
index f77e2ce41..365e73e5d 100644
--- a/mpm/python/usrp_mpm/xports/xportmgr_udp.py
+++ b/mpm/python/usrp_mpm/xports/xportmgr_udp.py
@@ -9,6 +9,7 @@ UDP Transport manager
"""
from six import iteritems, itervalues
+from usrp_mpm import prefs
from usrp_mpm.ethdispatch import EthDispatcherCtrl
from usrp_mpm.sys_utils import net
@@ -131,6 +132,10 @@ class XportMgrUDP:
self._eth_dispatchers[iface].set_ipv4_addr(
self._chdr_ifaces[iface]['ip_addr']
)
+ if self.iface_config[iface]['type'] == 'internal':
+ #TODO: Get MAC address from EEPROM
+ internal_ip_addr = self.get_internal_interface_address(iface)
+ self._eth_dispatchers[iface].setup_internal_interface('00:01:02:03:04:05', internal_ip_addr)
def init(self, args):
"""