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authorVirendra Kakade <virendra.kakade@ni.com>2022-03-23 17:10:08 -0500
committerAaron Rossetto <aaron.rossetto@ni.com>2022-03-28 12:47:17 -0700
commit4b94840abf5e74a1f4b4f4cff6bc8ff5a8296b59 (patch)
treee15b903a8d4320fa3000b2fa0cbd91f138dc9bf6 /mpm
parent348c88ba069917125ea59dd7cc4db570c7e6a9e9 (diff)
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fixup! uhd: add support for max10 variants
Diffstat (limited to 'mpm')
-rw-r--r--mpm/python/usrp_mpm/chips/max10_cpld_flash_ctrl.py6
1 files changed, 4 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/chips/max10_cpld_flash_ctrl.py b/mpm/python/usrp_mpm/chips/max10_cpld_flash_ctrl.py
index 388706b5a..40a6652c1 100644
--- a/mpm/python/usrp_mpm/chips/max10_cpld_flash_ctrl.py
+++ b/mpm/python/usrp_mpm/chips/max10_cpld_flash_ctrl.py
@@ -111,9 +111,11 @@ class Max10CpldFlashCtrl():
# value encoded in the FLASH_CFM0_START_ADDR_REG
# register
start_addr = self.get_start_addr()
- if start_addr == 0x9C00:
+ # 0x9C00 -> X410 MB, 0x1000 -> ZBX DB
+ if start_addr in [0x9C00, 0x1000]:
self.max10_variant = "m04"
- elif start_addr == 0xAC00:
+ # 0xAC00 -> X410 MB, 0x2000 -> ZBX DB
+ elif start_addr in [0xAC00, 0x2000]:
self.max10_variant = "m08"
else:
raise RuntimeError('Unknown MAX10 variant (FLASH_CFM0_START_ADDR_REG=0x{:04X})'.format(start_addr))