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authorMartin Braun <martin.braun@ettus.com>2018-08-10 15:26:16 -0700
committerMartin Braun <martin.braun@ettus.com>2018-08-13 13:32:04 -0700
commit276cd040f3c847cc090247d291ccf0c7f06183a8 (patch)
tree458d370eec5c990dc01ad8fed7b3273ba2b421db /mpm
parentf2914ff43752724bc46deb73374339ae97a33f61 (diff)
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mpm: n3xx: Improve error messages for invalid clock/time settings
Diffstat (limited to 'mpm')
-rw-r--r--mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py6
1 files changed, 4 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py b/mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py
index 803f056c3..0370f6e67 100644
--- a/mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py
+++ b/mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py
@@ -294,7 +294,9 @@ class MboardRegsControl(object):
"""
pps_sel_val = 0x0
if time_source == 'internal':
- assert ref_clk_freq in (10e6, 25e6)
+ assert ref_clk_freq in (10e6, 25e6), \
+ "Invalid reference frequency for time source 'internal'. Must " \
+ "be either 10 MHz or 25 MHz. Check clock and time source match."
if ref_clk_freq == 10e6:
self.log.debug("Setting time source to internal "
"(10 MHz reference)...")
@@ -316,7 +318,7 @@ class MboardRegsControl(object):
self.log.debug("Setting time source to sfp1...")
pps_sel_val = 0b1 << self.MB_CLOCK_CTRL_PPS_SEL_SFP1
else:
- assert False
+ raise RuntimeError("Invalid time source: {}".format(time_source))
with self.regs:
reg_val = self.peek32(self.MB_CLOCK_CTRL) & 0xFFFFFF90