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author | Martin Braun <martin.braun@ettus.com> | 2017-05-12 11:22:20 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2017-12-22 15:03:53 -0800 |
commit | ca1723c02ea3d30f1003840f6fc1350e39c97485 (patch) | |
tree | ba31dc01fd4045dee2f068e16a5cb26da3fad46b /mpm | |
parent | 1e7ab6df5abcc8b04a24d941c0785a104e91ca16 (diff) | |
download | uhd-ca1723c02ea3d30f1003840f6fc1350e39c97485.tar.gz uhd-ca1723c02ea3d30f1003840f6fc1350e39c97485.tar.bz2 uhd-ca1723c02ea3d30f1003840f6fc1350e39c97485.zip |
eiscat: Enabled Phase DAC SPI
Requires the appropriate overlay.
Diffstat (limited to 'mpm')
-rw-r--r-- | mpm/python/usrp_mpm/dboard_manager/eiscat.py | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/eiscat.py b/mpm/python/usrp_mpm/dboard_manager/eiscat.py index 71857ecac..7a930af79 100644 --- a/mpm/python/usrp_mpm/dboard_manager/eiscat.py +++ b/mpm/python/usrp_mpm/dboard_manager/eiscat.py @@ -358,13 +358,13 @@ class EISCAT(DboardManagerBase): "lmk": 0, "adc0": 1, "adc1": 2, - # "phase_dac": 3, + "phase_dac": 3, } spi_factories = { "lmk": create_spidev_iface_sane, "adc0": create_spidev_iface_sane, "adc1": create_spidev_iface_sane, - # "phase_dac": create_spidev_iface_phasedac, + "phase_dac": create_spidev_iface_phasedac, } def __init__(self, slot_idx, **kwargs): @@ -456,6 +456,8 @@ class EISCAT(DboardManagerBase): for i in xrange(2): if not self.jesd_cores[i].check_deframer_status(): raise RuntimeError("JESD Core {}: Deframer status not lookin' so good!".format(i)) + + self.phase_dac = self._spi_ifaces['phase_dac'] ## END OF THE JEPSON SEQUENCE ## self.initialized = True |