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| author | Ashish Chaudhari <ashish@ettus.com> | 2017-12-21 13:22:41 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-12-22 15:06:03 -0800 |
| commit | 8eeb664b6762451b506a39da3bc21e96779ab300 (patch) | |
| tree | 554c5afb43633d0720f9497bc2b39cce57c3b695 /mpm | |
| parent | edc817024647fa5b293f7ed885197ecbb06b65ff (diff) | |
| download | uhd-8eeb664b6762451b506a39da3bc21e96779ab300.tar.gz uhd-8eeb664b6762451b506a39da3bc21e96779ab300.tar.bz2 uhd-8eeb664b6762451b506a39da3bc21e96779ab300.zip | |
n3xx: Removed PHY reset after Aurora BIST
- A PHY reset is not needed for SFP Aurora. It is only really
useful when the entire quad including the commong clocking
block needs to be reset
Diffstat (limited to 'mpm')
| -rw-r--r-- | mpm/python/usrp_mpm/aurora_control.py | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/aurora_control.py b/mpm/python/usrp_mpm/aurora_control.py index b78960007..8cea73464 100644 --- a/mpm/python/usrp_mpm/aurora_control.py +++ b/mpm/python/usrp_mpm/aurora_control.py @@ -199,10 +199,9 @@ class AuroraControl(object): return bool(self.read_phy_ctrl_status() & 0x1) def reset_core(self): - " Reset PHY and MAC " + " Reset MAC. PHY reset not necessary" self.clear_control_reg() self.clear_mac() - self.reset_phy() def run_latency_loopback_bist( self, |