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| author | Mark Meserve <mark.meserve@ni.com> | 2018-09-26 10:50:34 -0500 |
|---|---|---|
| committer | Brent Stapleton <brent.stapleton@ettus.com> | 2018-12-12 16:27:25 -0800 |
| commit | 22836d65e71a0ad01827bdeb855018a8aaddf072 (patch) | |
| tree | 9ecc4de775606c6570e7b5803225c7298644302f /mpm | |
| parent | 75ee8e0314b7149ae4ef57e15b15c6bdfa3ac099 (diff) | |
| download | uhd-22836d65e71a0ad01827bdeb855018a8aaddf072.tar.gz uhd-22836d65e71a0ad01827bdeb855018a8aaddf072.tar.bz2 uhd-22836d65e71a0ad01827bdeb855018a8aaddf072.zip | |
rh: remove polarity setting for sdclkout11
- output 11 is unused, a value of 0 will leave the polarity as normal
Diffstat (limited to 'mpm')
| -rw-r--r-- | mpm/python/usrp_mpm/dboard_manager/lmk_rh.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/lmk_rh.py b/mpm/python/usrp_mpm/dboard_manager/lmk_rh.py index 240948fe5..c2c2ca560 100644 --- a/mpm/python/usrp_mpm/dboard_manager/lmk_rh.py +++ b/mpm/python/usrp_mpm/dboard_manager/lmk_rh.py @@ -170,7 +170,7 @@ class LMK04828Rh(LMK04828): (0x12C, 0x00), # CLKout Config (0x12D, 0x00), # CLKout Config (0x12E, 0x71), # CLKout Config - (0x12F, 0x85), # CLKout Config + (0x12F, 0x05), # CLKout Config (0x130, convclk_div_val), # CLKout Config (ADC Clock) (0x131, convclk_cnt_val), # CLKout Config (0x132, 0x22), # CLKout Config @@ -319,4 +319,4 @@ class LMK04828Rh(LMK04828): self.poke8(0x11F, 0x05 if enb else 0x00) def enable_rx_lb_lo(self, enb): - self.poke8(0x12F, 0x85 if enb else 0x80) + self.poke8(0x12F, 0x05 if enb else 0x00) |