mpm: Updating ref clock frequency will propagate to dboard, changed slot indexing to numbers

7 files changed, 57 insertions, 15 deletions

diff --git a/mpm/python/usrp_mpm/dboard_manager/base.py b/mpm/python/usrp_mpm/dboard_manager/base.py
index 52d2f22a3..13284f6d3 100644
--- a/mpm/python/usrp_mpm/dboard_manager/base.py
+++ b/mpm/python/usrp_mpm/dboard_manager/base.py
@@ -34,3 +34,9 @@ class DboardManagerBase(object):
 
     def get_serial(self):
         return self._eeprom.get("serial", "")
+
+    def update_ref_clock_freq(self, freq):
+        """
+        Call this function if the frequency of the reference clock changes.
+        """
+        self.log.warning("update_ref_clock_freq() called but not implemented")
diff --git a/mpm/python/usrp_mpm/dboard_manager/eiscat.py b/mpm/python/usrp_mpm/dboard_manager/eiscat.py
index da8b1eb05..552072fe9 100644
--- a/mpm/python/usrp_mpm/dboard_manager/eiscat.py
+++ b/mpm/python/usrp_mpm/dboard_manager/eiscat.py
@@ -197,10 +197,10 @@ class JesdCoreEiscat(object):
     ADDR_BASE = 0x0000
     ADDR_OFFSET = 0x1000
 
-    def __init__(self, regs, slot, core_idx, log):
+    def __init__(self, regs, slot_idx, core_idx, log):
         self.log = log
         self.regs = regs
-        self.slot = slot
+        self.slot = "A" if slot_idx == 0 else "B"
         assert core_idx in (0, 1)
         self.core_idx = core_idx
         self.base_addr = self.ADDR_BASE + self.ADDR_OFFSET * self.core_idx
@@ -346,10 +346,13 @@ class EISCAT(DboardManagerBase):
         "adc1": 2
     }
 
-    def __init__(self, spi_devices, *args, **kwargs):
+    def __init__(self, slot_idx, spi_devices, *args, **kwargs):
         super(EISCAT, self).__init__(*args, **kwargs)
         self.log = get_logger("EISCAT")
-        self.log.trace("Initializing EISCAT daughterbaord")
+        self.slot_idx = slot_idx
+        self.log.trace("Initializing EISCAT daughterboard, slot index {}".format(self.slot_idx))
+        self.initialized = False
+        self.ref_clock_freq = 10e6
         if len(spi_devices) < len(self.spi_chipselect):
             self.log.error("Expected {0} spi devices, found {1} spi devices".format(
                 len(self.spi_chipselect), len(spi_devices),
@@ -369,6 +372,7 @@ class EISCAT(DboardManagerBase):
         self.lmk = None
         self.adc0 = None
         self.adc1 = None
+        self.mmcm = None
 
     def init_device(self):
         """
@@ -387,7 +391,7 @@ class EISCAT(DboardManagerBase):
         self.jesd_cores = [
             JesdCoreEiscat(
                 self.radio_regs,
-                "A", # TODO fix hard-coded slot number
+                self.slot_idx,
                 core_idx,
                 self.log
             ) for core_idx in xrange(2)
@@ -400,7 +404,7 @@ class EISCAT(DboardManagerBase):
         self.mmcm = MMCM(self.radio_regs, self.log)
         self._init_power(self.radio_regs)
         self.mmcm.reset()
-        self.lmk = LMK04828EISCAT(self._spi_ifaces['lmk'], "A") # Initializes LMK
+        self.lmk = LMK04828EISCAT(self._spi_ifaces['lmk'], self.ref_clock_freq, "A") # Initializes LMK
         if not self.mmcm.enable():
             self.log.error("Could not re-enable MMCM!")
             raise RuntimeError("Could not re-enable MMCM!")
@@ -442,6 +446,14 @@ class EISCAT(DboardManagerBase):
             if not self.jesd_cores[i].check_deframer_status():
                 raise RuntimeError("JESD Core {}: Deframer status not lookin' so good!".format(i))
         ## END OF THE JEPSON SEQUENCE ##
+        self.initialized = True
+
+    def shutdown(self):
+        """
+        Safely turn off the daughterboard
+        """
+        self.log.info("Shutting down daughterboard")
+        self._deinit_power()
 
 
     def _init_power(self, regs):
@@ -475,3 +487,16 @@ class EISCAT(DboardManagerBase):
         self.log.trace("Disabling power to the daughterboard...")
         regs.poke32(POWER_ENB, 0x0000)
 
+    def update_ref_clock_freq(self, freq):
+        """
+        Call this to notify the daughterboard about a change in reference clock
+        """
+        self.ref_clock_freq = freq
+        if self.initialized:
+            self.log.warning(
+                "Attempting to update external reference clock frequency "
+                "after initialization! This will only take effect after "
+                "the daughterboard is re-initialized."
+            )
+
+
diff --git a/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py b/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
index f5114607a..f169e2589 100644
--- a/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
+++ b/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
@@ -27,9 +27,11 @@ class LMK04828EISCAT(object):
     """
     LMK04828 controls for EISCAT daughterboard
     """
-    def __init__(self, regs_iface, slot=None):
+    def __init__(self, regs_iface, ref_clock_freq, slot=None):
         slot = slot or "-A"
         self.log = get_logger("LMK04828"+slot)
+        assert ref_clock_freq in (10e6, 20e6)
+        self.ref_clock_freq = ref_clock_freq
         self.regs_iface = regs_iface
         self.init()
         self.config()
@@ -61,6 +63,7 @@ class LMK04828EISCAT(object):
         Write lots of config foo.
         """
         self.log.trace("Setting clkout config...")
+        CLKin0_R_divider = {10e6: 0x0A, 20e6: 0x14}[self.ref_clock_freq]
         self.pokes8((
             (0x100, 0x6C), # CLKout Config
             (0x101, 0x55), # CLKout Config
@@ -139,7 +142,7 @@ class LMK04828EISCAT(object):
             (0x151, 0x02), # Holdover Settings (defaults)
             (0x152, 0x00), # Holdover Settings (defaults)
             (0x153, 0x00), # CLKin0_R divider [13:8], default = 0
-            (0x154, 0x0A), # CLKin0_R divider [7:0], default = d120
+            (0x154, CLKin0_R_divider), # CLKin0_R divider [7:0], default = d120
             (0x155, 0x00), # CLKin1_R divider [13:8], default = 0
             (0x156, 0x01), # CLKin1_R divider [7:0], default = d120
             (0x157, 0x00), # CLKin2_R divider [13:8], default = 0
diff --git a/mpm/python/usrp_mpm/dboard_manager/magnesium.py b/mpm/python/usrp_mpm/dboard_manager/magnesium.py
index aa667e1e0..fa2dbe9c3 100644
--- a/mpm/python/usrp_mpm/dboard_manager/magnesium.py
+++ b/mpm/python/usrp_mpm/dboard_manager/magnesium.py
@@ -36,7 +36,7 @@ class Magnesium(DboardManagerBase):
     # Maps the chipselects to the corresponding devices:
     spi_chipselect = {"lmk": 0, "mykonos": 1}
 
-    def __init__(self, spi_devices, eeprom_data, *args, **kwargs):
+    def __init__(self, slot_idx, spi_devices, eeprom_data, *args, **kwargs):
         super(Magnesium, self).__init__(*args, **kwargs)
         self.log = get_logger("Magnesium")
         # eeprom_data is a tuple (head_dict, raw_data)
diff --git a/mpm/python/usrp_mpm/periph_manager/base.py b/mpm/python/usrp_mpm/periph_manager/base.py
index 25f635c68..ea2a145a8 100644
--- a/mpm/python/usrp_mpm/periph_manager/base.py
+++ b/mpm/python/usrp_mpm/periph_manager/base.py
@@ -21,7 +21,6 @@ Mboard implementation base class
 import os
 from six import iteritems
 from ..mpmlog import get_logger
-from logging import getLogger
 from ..types import EEPROM
 from .. import dboard_manager
 from .udev import get_eeprom_path
@@ -68,7 +67,7 @@ class PeriphManagerBase(object):
                 # spi_devices = get_spidev_nodes(self.dboard_spimaster_addrs.get(dboard_slot))
             # dboard = dboard_manager.HW_PIDS.get(hw_pid, dboard_manager.unknown)
             # self.dboards.update({dboard_slot: dboard(spi_devices, eeprom_data)})
-        dboard_slot = "A"
+        dboard_slot = 0
         self.log.debug("Adding dboard for slot {0}".format(dboard_slot))
         spi_devices = []
         # I know EEPROM adresses for my dboard slots
@@ -80,7 +79,7 @@ class PeriphManagerBase(object):
             spi_devices = sorted(get_spidev_nodes("e0006000.spi"))
             self.log.debug("Found spidev nodes: {0}".format(spi_devices))
         dboard = dboard_manager.HW_PIDS.get(hw_pid, dboard_manager.unknown)
-        self.dboards.update({dboard_slot: dboard(spi_devices, eeprom_data)})
+        self.dboards.update({dboard_slot: dboard(0, spi_devices, eeprom_data)})
 
     def safe_list_updateable_components(self):
         """
diff --git a/mpm/python/usrp_mpm/periph_manager/n310.py b/mpm/python/usrp_mpm/periph_manager/n310.py
index 0aff6dd9b..56dba2ca8 100644
--- a/mpm/python/usrp_mpm/periph_manager/n310.py
+++ b/mpm/python/usrp_mpm/periph_manager/n310.py
@@ -20,6 +20,7 @@ N310 implementation module
 from __future__ import print_function
 import struct
 import netaddr
+from six import iteritems
 from .base import PeriphManagerBase
 from .net import get_iface_addrs
 from .net import byte_to_mac
@@ -137,8 +138,9 @@ class n310(PeriphManagerBase):
         # if header.get("dataversion", 0) == 1:
 
         # Initialize our daughterboards:
-        self.log.debug("Initializing A-side dboard")
-        self.dboards['A'].init_device()
+        self.log.debug("Initializing dboards...")
+        for k, dboard in iteritems(self.dboards):
+            dboard.init_device()
 
     def _read_eeprom_v1(self, data):
         """
@@ -247,4 +249,11 @@ class n310(PeriphManagerBase):
         else: # external
             self._gpios.reset("CLK-MAINREF-SEL0")
             self._gpios.reset("CLK-MAINREF-SEL1")
+        self._clock_source = clock_source
+        ref_clk_freq = self.get_clock_freq()
+        for slot, dboard in iteritems(self.dboards):
+            if hasattr(dboard, 'update_ref_clock_freq'):
+                self.log.trace(
+                    "Updating reference clock on dboard `{}' to {} MHz...".format(slot, ref_clk_freq/1e6)
+                )
 
diff --git a/mpm/python/usrp_mpm/rpc_server.py b/mpm/python/usrp_mpm/rpc_server.py
index 734dc1df7..ab9d017e7 100644
--- a/mpm/python/usrp_mpm/rpc_server.py
+++ b/mpm/python/usrp_mpm/rpc_server.py
@@ -52,7 +52,7 @@ class MPMServer(RPCServer):
         self._update_component_commands(mgr, '', '_mb_methods')
         # add public dboard methods in `db_<slot>_` namespace
         for db_slot, dboard in iteritems(mgr.dboards):
-            self._update_component_commands(dboard, 'db_' + db_slot + '_', '_db_methods')
+            self._update_component_commands(dboard, 'db_' + str(db_slot) + '_', '_db_methods')
         super(MPMServer, self).__init__(*args, **kwargs)
 
     def _update_component_commands(self, component, namespace, storage):