mpm: e3xx: Fix get_sync_sources() API

get_sync_sources() was not implemented for E31x and E320. Because UHD
assumes this exists, calling this would cause an error like this:

>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=e3xx")
>>> U.get_sync_sources(0)
Traceback (most recent call last):
File "<input>", line 1, in <module>
U.get_sync_sources(0)
RuntimeError: rpc::timeout: Timeout of 2000ms while calling RPC function
'get_sync_sources'

3 files changed, 30 insertions, 2 deletions

diff --git a/mpm/python/usrp_mpm/periph_manager/base.py b/mpm/python/usrp_mpm/periph_manager/base.py
index 0e6aad370..ff4a358b3 100644
--- a/mpm/python/usrp_mpm/periph_manager/base.py
+++ b/mpm/python/usrp_mpm/periph_manager/base.py
@@ -1278,7 +1278,7 @@ class PeriphManagerBase(object):
             sync_args_str = \
                 ','.join([str(k) + '=' + str(v) for k, v in sync_args.items()])
             self.log.warn(
-                f"Attempting to set unrecognized Sync source {sync_args_str}!")
+                f"Attempting to set unrecognized Sync source `{sync_args_str}'!")
         clock_source = sync_args.get('clock_source', self.get_clock_source())
         time_source = sync_args.get('time_source', self.get_time_source())
         self.set_clock_source(clock_source)
diff --git a/mpm/python/usrp_mpm/periph_manager/e31x.py b/mpm/python/usrp_mpm/periph_manager/e31x.py
index 17a21d6e7..4d5e8f3cd 100644
--- a/mpm/python/usrp_mpm/periph_manager/e31x.py
+++ b/mpm/python/usrp_mpm/periph_manager/e31x.py
@@ -523,7 +523,7 @@ class e31x(ZynqComponents, PeriphManagerBase):
     def get_clock_sources(self):
         " Lists all available clock sources. "
         self.log.trace("Listing available clock sources...")
-        return ('internal',)
+        return (E310_DEFAULT_CLOCK_SOURCE,)
 
     def get_clock_source(self):
         " Returns the currently selected clock source "
@@ -556,6 +556,15 @@ class e31x(ZynqComponents, PeriphManagerBase):
         self._time_source = time_source
         self.mboard_regs_control.set_time_source(time_source)
 
+    def get_sync_sources(self):
+        """
+        List sync sources.
+        """
+        return [{
+            "time_source": time_source,
+            "clock_source": E310_DEFAULT_CLOCK_SOURCE
+        } for time_source in self.get_time_sources()]
+
     ###########################################################################
     # GPIO API
     ###########################################################################
diff --git a/mpm/python/usrp_mpm/periph_manager/e320.py b/mpm/python/usrp_mpm/periph_manager/e320.py
index f3a8da12d..c06ba897a 100644
--- a/mpm/python/usrp_mpm/periph_manager/e320.py
+++ b/mpm/python/usrp_mpm/periph_manager/e320.py
@@ -463,6 +463,25 @@ class e320(ZynqComponents, PeriphManagerBase):
         self._time_source = time_source
         self.mboard_regs_control.set_time_source(time_source, self.get_ref_clock_freq())
 
+    def get_sync_sources(self):
+        """
+        List sync sources.
+        """
+        valid_sync_sources = {
+            # clock, time. Reminder: 'internal' is an alias for 'gpsdo'
+            # pylint: disable=bad-whitespace
+            ('internal', 'internal'),
+            ('external', 'internal'),
+            ('external', 'external'),
+            ('gpsdo',    'gpsdo'   ),
+            ('gpsdo',    'internal'),
+            # pylint: enable=bad-whitespace
+        }
+        return [{
+            "time_source": time_source,
+            "clock_source": clock_source
+        } for (clock_source, time_source) in valid_sync_sources]
+
     ###########################################################################
     # GPIO API
     ###########################################################################