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| author | Martin Braun <martin.braun@ettus.com> | 2017-11-20 13:16:34 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-12-22 15:05:07 -0800 |
| commit | 63f4049a101d66c01f7e89098b03f3f780647cbd (patch) | |
| tree | 393d31541c18d6e2cbbcc217c16afee2cba00a70 /mpm/python | |
| parent | 59ecec43d4120e0b8e5d5d6ede1c673b5575a14f (diff) | |
| download | uhd-63f4049a101d66c01f7e89098b03f3f780647cbd.tar.gz uhd-63f4049a101d66c01f7e89098b03f3f780647cbd.tar.bz2 uhd-63f4049a101d66c01f7e89098b03f3f780647cbd.zip | |
mg: Enable variable master clock rates
The master_clock_rate argument is passed to init() during
initialization; this change allows to query the correct MCR at
initialization time. It does not allow changing the MCR while a session
is active.
The MCR also affects the LO settings; it is the reference clock for the
lowband LOs.
Diffstat (limited to 'mpm/python')
| -rw-r--r-- | mpm/python/usrp_mpm/dboard_manager/magnesium.py | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/magnesium.py b/mpm/python/usrp_mpm/dboard_manager/magnesium.py index d3c8c0bb6..5b6b81598 100644 --- a/mpm/python/usrp_mpm/dboard_manager/magnesium.py +++ b/mpm/python/usrp_mpm/dboard_manager/magnesium.py @@ -344,7 +344,7 @@ class Magnesium(DboardManagerBase): # This is a default ref clock freq, it must be updated before init() is # called! self.ref_clock_freq = 10e6 - self.master_clock_freq = 125e6 # Same + self.master_clock_rate = 125e6 # Same # Predeclare some attributes to make linter happy: self.lmk = None self.clock_synchronizer = None @@ -524,7 +524,7 @@ class Magnesium(DboardManagerBase): self.lmk, self._spi_ifaces['phase_dac'], 0, # TODO this might not actually be zero - self.master_clock_freq, + self.master_clock_rate, self.ref_clock_freq, 860E-15, # TODO don't hardcode. This should live in the EEPROM self.INIT_PHASE_DAC_WORD, @@ -712,6 +712,10 @@ class Magnesium(DboardManagerBase): # This does not stop anyone from killing this process (and the thread) # while the EEPROM write is happening, though. + def get_master_clock_rate(self): + " Return master clock rate (== sampling rate) " + return self.master_clock_rate + ########################################################################## # Sensors |