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authorMartin Braun <martin.braun@ettus.com>2020-07-09 12:09:23 +0200
committerAaron Rossetto <aaron.rossetto@ni.com>2020-08-12 15:19:56 -0500
commit31cafbb3ed9020acb82c3ab29645154f25e90172 (patch)
tree6f2d9f3e4247ee98765c0273953a4e9f12922763 /mpm/python
parente8db6fa4301ce471bf41ef14d5d38e5727199007 (diff)
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rh: Enable inverse sinc filter for DAC37J82
This enables the inv_sinc_ab and inv_sinc_cd flags for the DAC, turning on the inverse sinc filter.
Diffstat (limited to 'mpm/python')
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/dac_rh.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/dac_rh.py b/mpm/python/usrp_mpm/dboard_manager/dac_rh.py
index 7fd32e8de..c5f812c51 100644
--- a/mpm/python/usrp_mpm/dboard_manager/dac_rh.py
+++ b/mpm/python/usrp_mpm/dboard_manager/dac_rh.py
@@ -104,7 +104,7 @@ class DAC37J82Rh(object):
self.log.trace("DAC Configuration.")
self.pokes16((
- (0x00, 0x0018), # config0: Interpolation 1x; ALARM enabled w/ pos. logic.
+ (0x00, 0x001B), # config0: Interpolation 1x; ALARM enabled w/ pos. logic.
(0x01, 0x0003), # config1: Rewriting reserved default values.
(0x02, 0x0002), # config2: Data not zero when link not established; 2's comp. arrives at input.
(0x03, 0x9300), # config3: Coarse DAC = 10 (9+1); TXENABLE internal is kept low.