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author | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-02-08 09:32:25 -0600 |
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committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-02-08 15:23:57 -0600 |
commit | 7956d0dbc34bf83c17d57925f69f43663213f823 (patch) | |
tree | feee2bb967a34bcd0f41563f953c1998dea64d1b /mpm/python/usrp_mpm | |
parent | 6e2a65e700de05a0da557dd9d5125b9867cb029b (diff) | |
download | uhd-7956d0dbc34bf83c17d57925f69f43663213f823.tar.gz uhd-7956d0dbc34bf83c17d57925f69f43663213f823.tar.bz2 uhd-7956d0dbc34bf83c17d57925f69f43663213f823.zip |
images: Revert x4xx manifest and FPGA compat update
Diffstat (limited to 'mpm/python/usrp_mpm')
-rw-r--r-- | mpm/python/usrp_mpm/periph_manager/x4xx.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx.py b/mpm/python/usrp_mpm/periph_manager/x4xx.py index 8c97dc043..afa3d8a98 100644 --- a/mpm/python/usrp_mpm/periph_manager/x4xx.py +++ b/mpm/python/usrp_mpm/periph_manager/x4xx.py @@ -44,7 +44,7 @@ X400_DEFAULT_MASTER_CLOCK_RATE = 122.88e6 X400_DEFAULT_TIME_SOURCE = X4xxClockMgr.TIME_SOURCE_INTERNAL X400_DEFAULT_CLOCK_SOURCE = X4xxClockMgr.CLOCK_SOURCE_INTERNAL X400_DEFAULT_ENABLE_PPS_EXPORT = True -X400_FPGA_COMPAT = (7, 5) +X400_FPGA_COMPAT = (7, 3) X400_DEFAULT_TRIG_DIRECTION = ClockingAuxBrdControl.DIRECTION_OUTPUT X400_MONITOR_THREAD_INTERVAL = 1.0 # seconds QSFPModuleConfig = namedtuple("QSFPModuleConfig", "modprs modsel devsymbol") |