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authorMoritz Fischer <moritz.fischer@ettus.com>2018-02-12 16:13:31 -0800
committerMartin Braun <martin.braun@ettus.com>2018-02-13 19:04:16 +0100
commit8f153c9497f62e4d3ca58f95c2bf2fc3b57f56a6 (patch)
tree40746aa48e728adfc8bf0bd2d5cdb2f48ad0737d /mpm/python/usrp_mpm
parenta69e9fc98c64908e3c4bc8aeb817664429a80db4 (diff)
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mpm: Add entries for renamed sfps
In order to match the front panel 0 and 1 for the SFPs, as well as for clarity and consistency reasons, udev rules will be put onto future filesystems in order to rename the eth1 eth2 devices to sfp0 and sfp1. This change *should* be backwards compatible, nevertheless, be careful and bump compat number. This also updates the uhd image loader manifest. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Diffstat (limited to 'mpm/python/usrp_mpm')
-rw-r--r--mpm/python/usrp_mpm/periph_manager/n310.py14
1 files changed, 13 insertions, 1 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/n310.py b/mpm/python/usrp_mpm/periph_manager/n310.py
index d6c836a9c..cb7d29f35 100644
--- a/mpm/python/usrp_mpm/periph_manager/n310.py
+++ b/mpm/python/usrp_mpm/periph_manager/n310.py
@@ -33,7 +33,7 @@ N3XX_DEFAULT_CLOCK_SOURCE = 'internal'
N3XX_DEFAULT_TIME_SOURCE = 'internal'
N3XX_DEFAULT_ENABLE_GPS = True
N3XX_DEFAULT_ENABLE_FPGPIO = True
-N3XX_FPGA_COMPAT = (4, 0)
+N3XX_FPGA_COMPAT = (5, 0)
N3XX_MONITOR_THREAD_INTERVAL = 1.0 # seconds
###############################################################################
@@ -337,6 +337,18 @@ class N310XportMgrUDP(XportMgrUDP):
xbar_port_map = {'eth1': 0, 'eth2': 1}
xbar_dev = "/dev/crossbar0"
iface_config = {
+ 'sfp0': {
+ 'label': 'misc-enet-regs0',
+ 'xbar': 0,
+ 'xbar_port': 0,
+ 'ctrl_src_addr': 0,
+ },
+ 'sfp1': {
+ 'label': 'misc-enet-regs1',
+ 'xbar': 0,
+ 'xbar_port': 1,
+ 'ctrl_src_addr': 1,
+ },
'eth1': {
'label': 'misc-enet-regs0',
'xbar': 0,