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authorMartin Braun <martin.braun@ettus.com>2018-05-07 15:27:29 -0700
committerMartin Braun <martin.braun@ettus.com>2018-05-08 11:37:12 -0700
commit9cf1a8e99a76409b9be727d9efc8189bca54c4eb (patch)
tree2ecda408f69d71bed6e3731be2b7c59045f40720 /mpm/python/n3xx_bist
parentf4b8879064f6090e2233165216e78944070b6a06 (diff)
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mpm: n3xx: Refactor n3xx_periphs into its own module
Diffstat (limited to 'mpm/python/n3xx_bist')
-rwxr-xr-xmpm/python/n3xx_bist8
1 files changed, 4 insertions, 4 deletions
diff --git a/mpm/python/n3xx_bist b/mpm/python/n3xx_bist
index 90764ea06..7873d9f6c 100755
--- a/mpm/python/n3xx_bist
+++ b/mpm/python/n3xx_bist
@@ -687,10 +687,10 @@ class N3XXBIST(object):
'write_patterns': list(patterns),
'read_patterns': list(patterns),
}
- from usrp_mpm.periph_manager import n3xx
- gpio_tca6424 = n3xx.TCA6424(self.mb_rev)
+ from usrp_mpm.periph_manager import n3xx, n3xx_periphs
+ gpio_tca6424 = n3xx_periphs.TCA6424(self.mb_rev)
gpio_tca6424.set("FPGA-GPIO-EN")
- mb_regs = n3xx.MboardRegsControl(n3xx.n3xx.mboard_regs_label, self.log)
+ mb_regs = n3xx_periphs.MboardRegsControl(n3xx.n3xx.mboard_regs_label, self.log)
mb_regs.set_fp_gpio_master(0xFFF)
# Allow some time for the front-panel GPIOs to become usable
time.sleep(.5)
@@ -698,7 +698,7 @@ class N3XXBIST(object):
ddr2 = 0xfc0
def _run_gpio(ddr, patterns):
" Run a GPIO test for a given set of patterns "
- gpio_ctrl = n3xx.FrontpanelGPIO(ddr)
+ gpio_ctrl = n3xx_periphs.FrontpanelGPIO(ddr)
for pattern in patterns:
gpio_set_all(gpio_ctrl, pattern, GPIO_WIDTH, ddr)
time.sleep(0.1)