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author | Mark Meserve <mark.meserve@ni.com> | 2017-05-02 17:09:03 -0500 |
---|---|---|
committer | Martin Braun <martin.braun@ettus.com> | 2017-12-22 15:03:52 -0800 |
commit | 24d3011233ba1cd0b8788eccfacd0b67cb776600 (patch) | |
tree | cfd2af3212182e76a84b1fcb325b26ebd266bdb6 /mpm/lib | |
parent | 8f9f29dabc1a0f9db1101f658d9bcbac526eca39 (diff) | |
download | uhd-24d3011233ba1cd0b8788eccfacd0b67cb776600.tar.gz uhd-24d3011233ba1cd0b8788eccfacd0b67cb776600.tar.bz2 uhd-24d3011233ba1cd0b8788eccfacd0b67cb776600.zip |
mg: bring up links
Diffstat (limited to 'mpm/lib')
-rw-r--r-- | mpm/lib/mykonos/ad937x_device.cpp | 16 | ||||
-rw-r--r-- | mpm/lib/mykonos/adi_ctrl.cpp | 2 | ||||
-rw-r--r-- | mpm/lib/mykonos/config/ad937x_config_t.cpp | 14 | ||||
-rw-r--r-- | mpm/lib/mykonos/config/ad937x_default_config.hpp | 108 |
4 files changed, 76 insertions, 64 deletions
diff --git a/mpm/lib/mykonos/ad937x_device.cpp b/mpm/lib/mykonos/ad937x_device.cpp index 68065e67d..0e0851f41 100644 --- a/mpm/lib/mykonos/ad937x_device.cpp +++ b/mpm/lib/mykonos/ad937x_device.cpp @@ -24,6 +24,7 @@ #include <functional> #include <iostream> +#include <thread> using namespace mpm::ad937x::device; using namespace mpm::ad937x::gpio; @@ -42,13 +43,14 @@ static const double RX_DEFAULT_FREQ = 1e9; static const double TX_DEFAULT_FREQ = 1e9; // TODO: get the actual device ID -static const uint32_t AD9371_PRODUCT_ID = 0x1F; +static const uint32_t AD9371_PRODUCT_ID = 0x1; // TODO: move this to whereever we declare the ARM binary static const size_t ARM_BINARY_SIZE = 98304; static const uint32_t INIT_CAL_TIMEOUT_MS = 10000; +// TODO: actually figure out what cals we want to run static const uint32_t INIT_CALS = TX_BB_FILTER | ADC_TUNER | @@ -96,9 +98,7 @@ void ad937x_device::_call_api_function(std::function<mykonosErr_t()> func) auto error = func(); if (error != MYKONOS_ERR_OK) { - std::cout << getMykonosErrorMessage(error); - // TODO: make UHD exception - //throw std::exception(getMykonosErrorMessage(error)); + throw mpm::runtime_error(getMykonosErrorMessage(error)); } } @@ -108,9 +108,7 @@ void ad937x_device::_call_gpio_api_function(std::function<mykonosGpioErr_t()> fu auto error = func(); if (error != MYKONOS_ERR_GPIO_OK) { - std::cout << getGpioMykonosErrorMessage(error); - // TODO: make UHD exception - //throw std::exception(getMykonosErrorMessage(error)); + throw mpm::runtime_error(getGpioMykonosErrorMessage(error)); } } @@ -217,13 +215,15 @@ void ad937x_device::begin_initialization() void ad937x_device::finish_initialization() { + std::this_thread::sleep_for(std::chrono::milliseconds(200)); // to check status, just call the same function with a 0 instead of a 1, seems good uint8_t mcs_status = 0; _call_api_function(std::bind(MYKONOS_enableMultichipSync, mykonos_config.device, 0, &mcs_status)); if ((mcs_status & 0x0A) != 0x0A) { - throw mpm::runtime_error("Multichip sync failed!"); + throw mpm::runtime_error(str(boost::format("Multichip sync failed! Read: %X Expected: %X") + % int(mcs_status) % int(0x0A))); } _call_api_function(std::bind(MYKONOS_initSubRegisterTables, mykonos_config.device)); diff --git a/mpm/lib/mykonos/adi_ctrl.cpp b/mpm/lib/mykonos/adi_ctrl.cpp index be3fa0ddb..ac83e2a56 100644 --- a/mpm/lib/mykonos/adi_ctrl.cpp +++ b/mpm/lib/mykonos/adi_ctrl.cpp @@ -241,7 +241,7 @@ commonErr_t CMB_closeLog(void) commonErr_t CMB_writeToLog(ADI_LOGLEVEL level, uint8_t deviceIndex, uint32_t errorCode, const char *comment) { - std::cout << "[CMB_writeToLog] level==" << level << " errorCode==" << errorCode << " " << comment << std::endl; + std::cout << "[CMB_writeToLog] level==" << level << " errorCode==" << errorCode << " " << comment; return COMMONERR_OK; } commonErr_t CMB_flushLog(void) diff --git a/mpm/lib/mykonos/config/ad937x_config_t.cpp b/mpm/lib/mykonos/config/ad937x_config_t.cpp index eac294299..0e6d499e6 100644 --- a/mpm/lib/mykonos/config/ad937x_config_t.cpp +++ b/mpm/lib/mykonos/config/ad937x_config_t.cpp @@ -60,6 +60,11 @@ void ad937x_config_t::_assign_default_configuration() _orxPowerAgc = DEFAULT_ORX_POWER_AGC; _orxAgcCtrl = DEFAULT_ORX_AGC_CTRL; + // TODO: this is ridiculous + // oh, and ORX bring up requires a valid sniffer gain control + // https://github.com/EttusResearch/uhddev/blob/n3xx-master/mpm/lib/mykonos/adi/mykonos.c#L5713 + _snifferGainCtrl = DEFAULT_SNIFFER_GAIN; + _armGpio = DEFAULT_ARM_GPIO; _gpio3v3 = DEFAULT_GPIO_3V3; _gpio = DEFAULT_GPIO; @@ -110,7 +115,6 @@ void ad937x_config_t::_init_pointers() _snifferProfile.rxFir = _sniffer_rx_fir_config.fir; _obsRx.snifferGainCtrl = &_snifferGainCtrl; // sniffer has no AGC ctrl, so leave as null - _obsRx.orxAgcCtrl = nullptr; _obsRx.framer = &_orxFramer; _auxIo.gpio3v3 = &_gpio3v3; @@ -121,9 +125,9 @@ void ad937x_config_t::_init_pointers() void ad937x_config_t::_assign_firs() { // TODO: get default filters here - tx_fir_config.set_fir(6, { 32, 0 }); - rx_fir_config.set_fir( -6,{ 48, 0 }); - _orx_fir_config.set_fir( -6, { 48, 0 }); - _sniffer_rx_fir_config.set_fir( -6, { 48, 0 }); + tx_fir_config.set_fir(6, std::vector<int16_t>(48, 0)); + rx_fir_config.set_fir(-6, std::vector<int16_t>(48, 0)); + _orx_fir_config.set_fir(-6, std::vector<int16_t>(48, 0)); + _sniffer_rx_fir_config.set_fir(-6, std::vector<int16_t>(48, 0)); } diff --git a/mpm/lib/mykonos/config/ad937x_default_config.hpp b/mpm/lib/mykonos/config/ad937x_default_config.hpp index dc476a0ee..b0f254308 100644 --- a/mpm/lib/mykonos/config/ad937x_default_config.hpp +++ b/mpm/lib/mykonos/config/ad937x_default_config.hpp @@ -42,9 +42,9 @@ static const mykonosRxProfile_t DEFAULT_RX_PROFILE = 5, // Decimation of Dec5 or Dec4 filter (5,4) 1, // If set, and DEC5 filter used, will use a higher rejection DEC5 FIR filter (1=Enabled, 0=Disabled) 1, // RX Half band 1 decimation (1 or 2) - 122880, // Rx IQ data rate in kHz + 125000, // Rx IQ data rate in kHz 100000000, // The Rx RF passband bandwidth for the profile - 100000, // Rx BBF 3dB corner in kHz + 102000, // Rx BBF 3dB corner in kHz NULL // pointer to custom ADC profile }; @@ -164,11 +164,11 @@ static const mykonosTxProfile_t DEFAULT_TX_PROFILE = 2, // Tx Halfband1 filter interpolation (1,2) 1, // Tx Halfband2 filter interpolation (1,2) 1, // TxInputHbInterpolation (1,2) - 122880, // Tx IQ data rate in kHz + 125000, // Tx IQ data rate in kHz 20000000, // Primary Signal BW - 100000000, // The Tx RF passband bandwidth for the profile - 710539, // The DAC filter 3dB corner in kHz - 50000, // Tx BBF 3dB corner in kHz + 102000000, // The Tx RF passband bandwidth for the profile + 722000, // The DAC filter 3dB corner in kHz + 51000, // Tx BBF 3dB corner in kHz 0 // Enable DPD, only valid for AD9373 }; @@ -240,18 +240,18 @@ static const mykonosORxGainControl_t DEFAULT_ORX_GAIN = static const mykonosAgcCfg_t DEFAULT_ORX_AGC_CTRL = { - 0, // agcRx1MaxGainIndex - 0, // agcRx1MinGainIndex - 0, // agcRx2MaxGainIndex - 0, // agcRx2MinGainIndex: - 0, // agcObsRxMaxGainIndex - 0, // agcObsRxMinGainIndex - 0, // agcObsRxSelect - 0, // agcPeakThresholdMode - 0, // agcLowThsPreventGainIncrease - 0, // agcGainUpdateCounter - 0, // agcSlowLoopSettlingDelay - 0, // agcPeakWaitTime + 255, // agcRx1MaxGainIndex + 195, // agcRx1MinGainIndex + 255, // agcRx2MaxGainIndex + 195, // agcRx2MinGainIndex: + 255, // agcObsRxMaxGainIndex + 203, // agcObsRxMinGainIndex + 1, // agcObsRxSelect + 1, // agcPeakThresholdMode + 1, // agcLowThsPreventGainIncrease + 30720, // agcGainUpdateCounter + 3, // agcSlowLoopSettlingDelay + 4, // agcPeakWaitTime 0, // agcResetOnRxEnable 0, // agcEnableSyncPulseForGainCounter nullptr,// *peakAgc @@ -260,40 +260,48 @@ static const mykonosAgcCfg_t DEFAULT_ORX_AGC_CTRL = static const mykonosPeakDetAgcCfg_t DEFAULT_ORX_PEAK_AGC = { - 0, // apdHighThresh: - 0, // apdLowThresh - 0, // hb2HighThresh - 0, // hb2LowThresh - 0, // hb2VeryLowThresh - 0, // apdHighThreshExceededCnt - 0, // apdLowThreshExceededCnt - 0, // hb2HighThreshExceededCnt - 0, // hb2LowThreshExceededCnt - 0, // hb2VeryLowThreshExceededCnt - 0, // apdHighGainStepAttack - 0, // apdLowGainStepRecovery - 0, // hb2HighGainStepAttack - 0, // hb2LowGainStepRecovery - 0, // hb2VeryLowGainStepRecovery - 0, // apdFastAttack - 0, // hb2FastAttack - 0, // hb2OverloadDetectEnable - 0, // hb2OverloadDurationCnt - 0 // hb2OverloadThreshCnt + 0x2A, // apdHighThresh: + 0x16, // apdLowThresh + 0xB5, // hb2HighThresh + 0x72, // hb2LowThresh + 0x40, // hb2VeryLowThresh + 0x03, // apdHighThreshExceededCnt + 0x03, // apdLowThreshExceededCnt + 0x03, // hb2HighThreshExceededCnt + 0x03, // hb2LowThreshExceededCnt + 0x03, // hb2VeryLowThreshExceededCnt + 0x4, // apdHighGainStepAttack + 0x2, // apdLowGainStepRecovery + 0x4, // hb2HighGainStepAttack + 0x2, // hb2LowGainStepRecovery + 0x4, // hb2VeryLowGainStepRecovery + 0x0, // apdFastAttack + 0x0, // hb2FastAttack + 0x1, // hb2OverloadDetectEnable + 0x1, // hb2OverloadDurationCnt + 0x1 // hb2OverloadThreshCnt }; static const mykonosPowerMeasAgcCfg_t DEFAULT_ORX_POWER_AGC = { - 0, // pmdUpperHighThresh - 0, // pmdUpperLowThresh - 0, // pmdLowerHighThresh - 0, // pmdLowerLowThresh - 0, // pmdUpperHighGainStepAttack - 0, // pmdUpperLowGainStepAttack - 0, // pmdLowerHighGainStepRecovery - 0, // pmdLowerLowGainStepRecovery - 0, // pmdMeasDuration - 0, // pmdMeasConfig + 0x01, // pmdUpperHighThresh + 0x03, // pmdUpperLowThresh + 0x0C, // pmdLowerHighThresh + 0x04, // pmdLowerLowThresh + 0x0, // pmdUpperHighGainStepAttack + 0x0, // pmdUpperLowGainStepAttack + 0x0, // pmdLowerHighGainStepRecovery + 0x0, // pmdLowerLowGainStepRecovery + 0x08, // pmdMeasDuration + 0x02 // pmdMeasConfig +}; + +static const mykonosSnifferGainControl_t DEFAULT_SNIFFER_GAIN = +{ + MGC, // Current Sniffer gain control mode setting + 255, // Current Sniffer gain index. Can be used differently for Manual Gain control/AGC + 255, // Max gain index for the currently loaded Sniffer Gain table + 203 // Min gain index for the currently loaded Sniffer Gain table }; static const mykonosRxProfile_t DEFAULT_ORX_PROFILE = @@ -367,8 +375,8 @@ static const mykonosAuxIo_t DEFAULT_AUX_IO = static const mykonosDigClocks_t DEFAULT_CLOCKS = { - 122880, // CLKPLL and device reference clock frequency in kHz - 9830400, // CLKPLL VCO frequency in kHz + 125000, // CLKPLL and device reference clock frequency in kHz + 10000000, // CLKPLL VCO frequency in kHz VCODIV_2, // CLKPLL VCO divider 4 // CLKPLL high speed clock divider }; |