Merged features/inband-usb r5224:6306 into trunk. This is work-in-progress on inband signaling for the USRP1.

git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@6307 221aa14e-8319-0410-a670-987f0aec2ac5

14 files changed, 869 insertions, 276 deletions

diff --git a/megacells/fifo_512.v b/megacells/fifo_2k_1clk.v
index b034b4ddc..095615bb8 100755
--- a/megacells/fifo_512.v
+++ b/megacells/fifo_2k_1clk.v
@@ -1,12 +1,12 @@
 // megafunction wizard: %LPM_FIFO+%

 // GENERATION: STANDARD

 // VERSION: WM1.0

-// MODULE: dcfifo 

+// MODULE: scfifo 

 

 // ============================================================

-// File Name: fifo_512.v

+// File Name: fifo_2k_1clk.v

 // Megafunction Name(s):

-// 			dcfifo

+// 			scfifo

 // ============================================================

 // ************************************************************

 // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!

@@ -33,73 +33,65 @@
 // synopsys translate_off

 `timescale 1 ps / 1 ps

 // synopsys translate_on

-module fifo_512 (

+module fifo_2k_1clk (

 	aclr,

+	clock,

 	data,

-	rdclk,

 	rdreq,

-	wrclk,

 	wrreq,

+	empty,

+	full,

 	q,

-	rdempty,

-	rdfull,

-	wrempty,

-	wrfull);

+	usedw);

 

 	input	  aclr;

-	input	[31:0]  data;

-	input	  rdclk;

+	input	  clock;

+	input	[15:0]  data;

 	input	  rdreq;

-	input	  wrclk;

 	input	  wrreq;

-	output	[31:0]  q;

-	output	  rdempty;

-	output	  rdfull;

-	output	  wrempty;

-	output	  wrfull;

+	output	  empty;

+	output	  full;

+	output	[15:0]  q;

+	output	[9:0]  usedw;

 

-	wire  sub_wire0;

+	wire [9:0] sub_wire0;

 	wire  sub_wire1;

-	wire  sub_wire2;

+	wire [15:0] sub_wire2;

 	wire  sub_wire3;

-	wire [31:0] sub_wire4;

-	wire  rdfull = sub_wire0;

-	wire  rdempty = sub_wire1;

-	wire  wrfull = sub_wire2;

-	wire  wrempty = sub_wire3;

-	wire [31:0] q = sub_wire4[31:0];

+	wire [9:0] usedw = sub_wire0[9:0];

+	wire  empty = sub_wire1;

+	wire [15:0] q = sub_wire2[15:0];

+	wire  full = sub_wire3;

 

-	dcfifo	dcfifo_component (

-				.wrclk (wrclk),

+	scfifo	scfifo_component (

 				.rdreq (rdreq),

 				.aclr (aclr),

-				.rdclk (rdclk),

+				.clock (clock),

 				.wrreq (wrreq),

 				.data (data),

-				.rdfull (sub_wire0),

-				.rdempty (sub_wire1),

-				.wrfull (sub_wire2),

-				.wrempty (sub_wire3),

-				.q (sub_wire4)

+				.usedw (sub_wire0),

+				.empty (sub_wire1),

+				.q (sub_wire2),

+				.full (sub_wire3)

 				// synopsys translate_off

 				,

-				.rdusedw (),

-				.wrusedw ()

+				.almost_empty (),

+				.sclr (),

+				.almost_full ()

 				// synopsys translate_on

 				);

 	defparam

-		dcfifo_component.add_ram_output_register = "OFF",

-		dcfifo_component.clocks_are_synchronized = "FALSE",

-		dcfifo_component.intended_device_family = "Cyclone",

-		dcfifo_component.lpm_hint = "RAM_BLOCK_TYPE=M4K",

-		dcfifo_component.lpm_numwords = 128,

-		dcfifo_component.lpm_showahead = "OFF",

-		dcfifo_component.lpm_type = "dcfifo",

-		dcfifo_component.lpm_width = 32,

-		dcfifo_component.lpm_widthu = 7,

-		dcfifo_component.overflow_checking = "ON",

-		dcfifo_component.underflow_checking = "ON",

-		dcfifo_component.use_eab = "ON";

+		scfifo_component.add_ram_output_register = "OFF",

+		scfifo_component.intended_device_family = "Cyclone",

+		scfifo_component.lpm_hint = "RAM_BLOCK_TYPE=M4K",

+		scfifo_component.lpm_numwords = 1024,

+		scfifo_component.lpm_showahead = "OFF",

+		scfifo_component.lpm_type = "scfifo",

+		scfifo_component.lpm_width = 16,

+		scfifo_component.lpm_widthu = 10,

+		scfifo_component.overflow_checking = "ON",

+		scfifo_component.underflow_checking = "ON",

+		scfifo_component.use_eab = "ON";

 

 

 endmodule

@@ -112,8 +104,8 @@ endmodule
 // Retrieval info: PRIVATE: AlmostFull NUMERIC "0"

 // Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"

 // Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"

-// Retrieval info: PRIVATE: Clock NUMERIC "4"

-// Retrieval info: PRIVATE: Depth NUMERIC "128"

+// Retrieval info: PRIVATE: Clock NUMERIC "0"

+// Retrieval info: PRIVATE: Depth NUMERIC "1024"

 // Retrieval info: PRIVATE: Empty NUMERIC "1"

 // Retrieval info: PRIVATE: Full NUMERIC "1"

 // Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"

@@ -125,56 +117,51 @@ endmodule
 // Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "2"

 // Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"

 // Retrieval info: PRIVATE: UsedW NUMERIC "1"

-// Retrieval info: PRIVATE: Width NUMERIC "32"

-// Retrieval info: PRIVATE: dc_aclr NUMERIC "1"

+// Retrieval info: PRIVATE: Width NUMERIC "16"

+// Retrieval info: PRIVATE: dc_aclr NUMERIC "0"

 // Retrieval info: PRIVATE: rsEmpty NUMERIC "1"

-// Retrieval info: PRIVATE: rsFull NUMERIC "1"

+// Retrieval info: PRIVATE: rsFull NUMERIC "0"

 // Retrieval info: PRIVATE: rsUsedW NUMERIC "0"

-// Retrieval info: PRIVATE: sc_aclr NUMERIC "0"

+// Retrieval info: PRIVATE: sc_aclr NUMERIC "1"

 // Retrieval info: PRIVATE: sc_sclr NUMERIC "0"

-// Retrieval info: PRIVATE: wsEmpty NUMERIC "1"

+// Retrieval info: PRIVATE: wsEmpty NUMERIC "0"

 // Retrieval info: PRIVATE: wsFull NUMERIC "1"

 // Retrieval info: PRIVATE: wsUsedW NUMERIC "0"

 // Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF"

-// Retrieval info: CONSTANT: CLOCKS_ARE_SYNCHRONIZED STRING "FALSE"

 // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"

 // Retrieval info: CONSTANT: LPM_HINT STRING "RAM_BLOCK_TYPE=M4K"

-// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "128"

+// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "1024"

 // Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"

-// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo"

-// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "32"

-// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "7"

+// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo"

+// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"

+// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "10"

 // Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"

 // Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"

 // Retrieval info: CONSTANT: USE_EAB STRING "ON"

-// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND aclr

-// Retrieval info: USED_PORT: data 0 0 32 0 INPUT NODEFVAL data[31..0]

-// Retrieval info: USED_PORT: q 0 0 32 0 OUTPUT NODEFVAL q[31..0]

-// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL rdclk

-// Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL rdempty

-// Retrieval info: USED_PORT: rdfull 0 0 0 0 OUTPUT NODEFVAL rdfull

+// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr

+// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock

+// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0]

+// Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL empty

+// Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL full

+// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0]

 // Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq

-// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL wrclk

-// Retrieval info: USED_PORT: wrempty 0 0 0 0 OUTPUT NODEFVAL wrempty

-// Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL wrfull

+// Retrieval info: USED_PORT: usedw 0 0 10 0 OUTPUT NODEFVAL usedw[9..0]

 // Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq

-// Retrieval info: CONNECT: @data 0 0 32 0 data 0 0 32 0

-// Retrieval info: CONNECT: q 0 0 32 0 @q 0 0 32 0

+// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0

+// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0

 // Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0

 // Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0

-// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0

-// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0

-// Retrieval info: CONNECT: rdfull 0 0 0 0 @rdfull 0 0 0 0

-// Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0

-// Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0

-// Retrieval info: CONNECT: wrempty 0 0 0 0 @wrempty 0 0 0 0

+// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0

+// Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0

+// Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0

+// Retrieval info: CONNECT: usedw 0 0 10 0 @usedw 0 0 10 0

 // Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0

 // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512.v TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512.inc TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512.cmp TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512.bsf TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512_inst.v TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512_bb.v TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512_waveforms.html TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512_wave*.jpg FALSE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_1clk.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_1clk.inc TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_1clk.cmp TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_1clk.bsf TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_1clk_inst.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_1clk_bb.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_1clk_waveforms.html FALSE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_1clk_wave*.jpg FALSE

diff --git a/megacells/fifo_2kx16.bsf b/megacells/fifo_2kx16.bsf
new file mode 100755
index 000000000..1067991fb
--- /dev/null
+++ b/megacells/fifo_2kx16.bsf
@@ -0,0 +1,99 @@
+/*

+WARNING: Do NOT edit the input and output ports in this file in a text

+editor if you plan to continue editing the block that represents it in

+the Block Editor! File corruption is VERY likely to occur.

+*/

+/*

+Copyright (C) 1991-2006 Altera Corporation

+Your use of Altera Corporation's design tools, logic functions 

+and other software and tools, and its AMPP partner logic 

+functions, and any output files any of the foregoing 

+(including device programming or simulation files), and any 

+associated documentation or information are expressly subject 

+to the terms and conditions of the Altera Program License 

+Subscription Agreement, Altera MegaCore Function License 

+Agreement, or other applicable license agreement, including, 

+without limitation, that your use is for the sole purpose of 

+programming logic devices manufactured by Altera and sold by 

+Altera or its authorized distributors.  Please refer to the 

+applicable agreement for further details.

+*/

+(header "symbol" (version "1.1"))

+(symbol

+	(rect 0 0 160 144)

+	(text "fifo_2kx16" (rect 51 1 119 17)(font "Arial" (font_size 10)))

+	(text "inst" (rect 8 128 25 140)(font "Arial" ))

+	(port

+		(pt 0 32)

+		(input)

+		(text "data[15..0]" (rect 0 0 60 14)(font "Arial" (font_size 8)))

+		(text "data[15..0]" (rect 20 26 71 39)(font "Arial" (font_size 8)))

+		(line (pt 0 32)(pt 16 32)(line_width 3))

+	)

+	(port

+		(pt 0 56)

+		(input)

+		(text "wrreq" (rect 0 0 35 14)(font "Arial" (font_size 8)))

+		(text "wrreq" (rect 20 50 45 63)(font "Arial" (font_size 8)))

+		(line (pt 0 56)(pt 16 56)(line_width 1))

+	)

+	(port

+		(pt 0 72)

+		(input)

+		(text "rdreq" (rect 0 0 30 14)(font "Arial" (font_size 8)))

+		(text "rdreq" (rect 20 66 44 79)(font "Arial" (font_size 8)))

+		(line (pt 0 72)(pt 16 72)(line_width 1))

+	)

+	(port

+		(pt 0 96)

+		(input)

+		(text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))

+		(text "clock" (rect 26 90 49 103)(font "Arial" (font_size 8)))

+		(line (pt 0 96)(pt 16 96)(line_width 1))

+	)

+	(port

+		(pt 0 120)

+		(input)

+		(text "aclr" (rect 0 0 21 14)(font "Arial" (font_size 8)))

+		(text "aclr" (rect 20 114 37 127)(font "Arial" (font_size 8)))

+		(line (pt 0 120)(pt 16 120)(line_width 1))

+	)

+	(port

+		(pt 160 32)

+		(output)

+		(text "q[15..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))

+		(text "q[15..0]" (rect 105 26 141 39)(font "Arial" (font_size 8)))

+		(line (pt 160 32)(pt 144 32)(line_width 3))

+	)

+	(port

+		(pt 160 56)

+		(output)

+		(text "full" (rect 0 0 16 14)(font "Arial" (font_size 8)))

+		(text "full" (rect 127 50 142 63)(font "Arial" (font_size 8)))

+		(line (pt 160 56)(pt 144 56)(line_width 1))

+	)

+	(port

+		(pt 160 72)

+		(output)

+		(text "empty" (rect 0 0 34 14)(font "Arial" (font_size 8)))

+		(text "empty" (rect 112 66 141 79)(font "Arial" (font_size 8)))

+		(line (pt 160 72)(pt 144 72)(line_width 1))

+	)

+	(port

+		(pt 160 88)

+		(output)

+		(text "usedw[10..0]" (rect 0 0 75 14)(font "Arial" (font_size 8)))

+		(text "usedw[10..0]" (rect 77 82 136 95)(font "Arial" (font_size 8)))

+		(line (pt 160 88)(pt 144 88)(line_width 3))

+	)

+	(drawing

+		(text "16 bits x 2048 words" (rect 58 116 144 128)(font "Arial" ))

+		(line (pt 16 16)(pt 144 16)(line_width 1))

+		(line (pt 144 16)(pt 144 128)(line_width 1))

+		(line (pt 144 128)(pt 16 128)(line_width 1))

+		(line (pt 16 128)(pt 16 16)(line_width 1))

+		(line (pt 16 108)(pt 144 108)(line_width 1))

+		(line (pt 16 90)(pt 22 96)(line_width 1))

+		(line (pt 22 96)(pt 16 102)(line_width 1))

+	)

+)

diff --git a/megacells/fifo_512.cmp b/megacells/fifo_2kx16.cmp
index 86fc07846..96c34d8d7 100755
--- a/megacells/fifo_512.cmp
+++ b/megacells/fifo_2kx16.cmp
@@ -13,19 +13,17 @@
 --applicable agreement for further details.

 

 

-component fifo_512

+component fifo_2kx16

 	PORT

 	(

-		aclr		: IN STD_LOGIC  := '0';

-		data		: IN STD_LOGIC_VECTOR (31 DOWNTO 0);

-		rdclk		: IN STD_LOGIC ;

+		aclr		: IN STD_LOGIC ;

+		clock		: IN STD_LOGIC ;

+		data		: IN STD_LOGIC_VECTOR (15 DOWNTO 0);

 		rdreq		: IN STD_LOGIC ;

-		wrclk		: IN STD_LOGIC ;

 		wrreq		: IN STD_LOGIC ;

-		q		: OUT STD_LOGIC_VECTOR (31 DOWNTO 0);

-		rdempty		: OUT STD_LOGIC ;

-		rdfull		: OUT STD_LOGIC ;

-		wrempty		: OUT STD_LOGIC ;

-		wrfull		: OUT STD_LOGIC 

+		empty		: OUT STD_LOGIC ;

+		full		: OUT STD_LOGIC ;

+		q		: OUT STD_LOGIC_VECTOR (15 DOWNTO 0);

+		usedw		: OUT STD_LOGIC_VECTOR (10 DOWNTO 0)

 	);

 end component;

diff --git a/megacells/fifo_512.inc b/megacells/fifo_2kx16.inc
index 9ae1e3af4..3d72c6601 100755
--- a/megacells/fifo_512.inc
+++ b/megacells/fifo_2kx16.inc
@@ -13,20 +13,18 @@
 --applicable agreement for further details.

 

 

-FUNCTION fifo_512 

+FUNCTION fifo_2kx16 

 (

 	aclr,

-	data[31..0],

-	rdclk,

+	clock,

+	data[15..0],

 	rdreq,

-	wrclk,

 	wrreq

 )

 

 RETURNS (

-	q[31..0],

-	rdempty,

-	rdfull,

-	wrempty,

-	wrfull

+	empty,

+	full,

+	q[15..0],

+	usedw[10..0]

 );

diff --git a/megacells/fifo_2kx16.v b/megacells/fifo_2kx16.v
new file mode 100755
index 000000000..eb229769d
--- /dev/null
+++ b/megacells/fifo_2kx16.v
@@ -0,0 +1,167 @@
+// megafunction wizard: %FIFO%

+// GENERATION: STANDARD

+// VERSION: WM1.0

+// MODULE: scfifo 

+

+// ============================================================

+// File Name: fifo_2kx16.v

+// Megafunction Name(s):

+// 			scfifo

+// ============================================================

+// ************************************************************

+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!

+//

+// 5.1 Build 213 01/19/2006 SP 1 SJ Web Edition

+// ************************************************************

+

+

+//Copyright (C) 1991-2006 Altera Corporation

+//Your use of Altera Corporation's design tools, logic functions 

+//and other software and tools, and its AMPP partner logic 

+//functions, and any output files any of the foregoing 

+//(including device programming or simulation files), and any 

+//associated documentation or information are expressly subject 

+//to the terms and conditions of the Altera Program License 

+//Subscription Agreement, Altera MegaCore Function License 

+//Agreement, or other applicable license agreement, including, 

+//without limitation, that your use is for the sole purpose of 

+//programming logic devices manufactured by Altera and sold by 

+//Altera or its authorized distributors.  Please refer to the 

+//applicable agreement for further details.

+

+

+// synopsys translate_off

+`timescale 1 ps / 1 ps

+// synopsys translate_on

+module fifo_2kx16 (

+	aclr,

+	clock,

+	data,

+	rdreq,

+	wrreq,

+	empty,

+	full,

+	q,

+	usedw);

+

+	input	  aclr;

+	input	  clock;

+	input	[15:0]  data;

+	input	  rdreq;

+	input	  wrreq;

+	output	  empty;

+	output	  full;

+	output	[15:0]  q;

+	output	[10:0]  usedw;

+

+	wire [10:0] sub_wire0;

+	wire  sub_wire1;

+	wire [15:0] sub_wire2;

+	wire  sub_wire3;

+	wire [10:0] usedw = sub_wire0[10:0];

+	wire  empty = sub_wire1;

+	wire [15:0] q = sub_wire2[15:0];

+	wire  full = sub_wire3;

+

+	scfifo	scfifo_component (

+				.rdreq (rdreq),

+				.aclr (aclr),

+				.clock (clock),

+				.wrreq (wrreq),

+				.data (data),

+				.usedw (sub_wire0),

+				.empty (sub_wire1),

+				.q (sub_wire2),

+				.full (sub_wire3)

+				// synopsys translate_off

+				,

+				.almost_empty (),

+				.sclr (),

+				.almost_full ()

+				// synopsys translate_on

+				);

+	defparam

+		scfifo_component.add_ram_output_register = "OFF",

+		scfifo_component.intended_device_family = "Cyclone",

+		scfifo_component.lpm_hint = "RAM_BLOCK_TYPE=M4K",

+		scfifo_component.lpm_numwords = 2048,

+		scfifo_component.lpm_showahead = "OFF",

+		scfifo_component.lpm_type = "scfifo",

+		scfifo_component.lpm_width = 16,

+		scfifo_component.lpm_widthu = 11,

+		scfifo_component.overflow_checking = "ON",

+		scfifo_component.underflow_checking = "ON",

+		scfifo_component.use_eab = "ON";

+

+

+endmodule

+

+// ============================================================

+// CNX file retrieval info

+// ============================================================

+// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"

+// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"

+// Retrieval info: PRIVATE: AlmostFull NUMERIC "0"

+// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"

+// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"

+// Retrieval info: PRIVATE: Clock NUMERIC "0"

+// Retrieval info: PRIVATE: Depth NUMERIC "2048"

+// Retrieval info: PRIVATE: Empty NUMERIC "1"

+// Retrieval info: PRIVATE: Full NUMERIC "1"

+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"

+// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"

+// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1"

+// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"

+// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"

+// Retrieval info: PRIVATE: Optimize NUMERIC "2"

+// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "2"

+// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"

+// Retrieval info: PRIVATE: UsedW NUMERIC "1"

+// Retrieval info: PRIVATE: Width NUMERIC "16"

+// Retrieval info: PRIVATE: dc_aclr NUMERIC "0"

+// Retrieval info: PRIVATE: rsEmpty NUMERIC "1"

+// Retrieval info: PRIVATE: rsFull NUMERIC "0"

+// Retrieval info: PRIVATE: rsUsedW NUMERIC "0"

+// Retrieval info: PRIVATE: sc_aclr NUMERIC "1"

+// Retrieval info: PRIVATE: sc_sclr NUMERIC "0"

+// Retrieval info: PRIVATE: wsEmpty NUMERIC "0"

+// Retrieval info: PRIVATE: wsFull NUMERIC "1"

+// Retrieval info: PRIVATE: wsUsedW NUMERIC "0"

+// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF"

+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"

+// Retrieval info: CONSTANT: LPM_HINT STRING "RAM_BLOCK_TYPE=M4K"

+// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "2048"

+// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"

+// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo"

+// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"

+// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "11"

+// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"

+// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"

+// Retrieval info: CONSTANT: USE_EAB STRING "ON"

+// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr

+// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock

+// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0]

+// Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL empty

+// Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL full

+// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0]

+// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq

+// Retrieval info: USED_PORT: usedw 0 0 11 0 OUTPUT NODEFVAL usedw[10..0]

+// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq

+// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0

+// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0

+// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0

+// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0

+// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0

+// Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0

+// Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0

+// Retrieval info: CONNECT: usedw 0 0 11 0 @usedw 0 0 11 0

+// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0

+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16.inc TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16.cmp TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16.bsf TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16_inst.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16_bb.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16_waveforms.html TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16_wave*.jpg FALSE

diff --git a/megacells/fifo_512_bb.v b/megacells/fifo_2kx16_bb.v
index b11803159..507bac073 100755
--- a/megacells/fifo_512_bb.v
+++ b/megacells/fifo_2kx16_bb.v
@@ -1,12 +1,12 @@
-// megafunction wizard: %LPM_FIFO+%VBB%

+// megafunction wizard: %FIFO%VBB%

 // GENERATION: STANDARD

 // VERSION: WM1.0

-// MODULE: dcfifo 

+// MODULE: scfifo 

 

 // ============================================================

-// File Name: fifo_512.v

+// File Name: fifo_2kx16.v

 // Megafunction Name(s):

-// 			dcfifo

+// 			scfifo

 // ============================================================

 // ************************************************************

 // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!

@@ -28,30 +28,26 @@
 //Altera or its authorized distributors.  Please refer to the 

 //applicable agreement for further details.

 

-module fifo_512 (

+module fifo_2kx16 (

 	aclr,

+	clock,

 	data,

-	rdclk,

 	rdreq,

-	wrclk,

 	wrreq,

+	empty,

+	full,

 	q,

-	rdempty,

-	rdfull,

-	wrempty,

-	wrfull);

+	usedw);

 

 	input	  aclr;

-	input	[31:0]  data;

-	input	  rdclk;

+	input	  clock;

+	input	[15:0]  data;

 	input	  rdreq;

-	input	  wrclk;

 	input	  wrreq;

-	output	[31:0]  q;

-	output	  rdempty;

-	output	  rdfull;

-	output	  wrempty;

-	output	  wrfull;

+	output	  empty;

+	output	  full;

+	output	[15:0]  q;

+	output	[10:0]  usedw;

 

 endmodule

 

@@ -63,8 +59,8 @@ endmodule
 // Retrieval info: PRIVATE: AlmostFull NUMERIC "0"

 // Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"

 // Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"

-// Retrieval info: PRIVATE: Clock NUMERIC "4"

-// Retrieval info: PRIVATE: Depth NUMERIC "128"

+// Retrieval info: PRIVATE: Clock NUMERIC "0"

+// Retrieval info: PRIVATE: Depth NUMERIC "2048"

 // Retrieval info: PRIVATE: Empty NUMERIC "1"

 // Retrieval info: PRIVATE: Full NUMERIC "1"

 // Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"

@@ -76,56 +72,51 @@ endmodule
 // Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "2"

 // Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"

 // Retrieval info: PRIVATE: UsedW NUMERIC "1"

-// Retrieval info: PRIVATE: Width NUMERIC "32"

-// Retrieval info: PRIVATE: dc_aclr NUMERIC "1"

+// Retrieval info: PRIVATE: Width NUMERIC "16"

+// Retrieval info: PRIVATE: dc_aclr NUMERIC "0"

 // Retrieval info: PRIVATE: rsEmpty NUMERIC "1"

-// Retrieval info: PRIVATE: rsFull NUMERIC "1"

+// Retrieval info: PRIVATE: rsFull NUMERIC "0"

 // Retrieval info: PRIVATE: rsUsedW NUMERIC "0"

-// Retrieval info: PRIVATE: sc_aclr NUMERIC "0"

+// Retrieval info: PRIVATE: sc_aclr NUMERIC "1"

 // Retrieval info: PRIVATE: sc_sclr NUMERIC "0"

-// Retrieval info: PRIVATE: wsEmpty NUMERIC "1"

+// Retrieval info: PRIVATE: wsEmpty NUMERIC "0"

 // Retrieval info: PRIVATE: wsFull NUMERIC "1"

 // Retrieval info: PRIVATE: wsUsedW NUMERIC "0"

 // Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF"

-// Retrieval info: CONSTANT: CLOCKS_ARE_SYNCHRONIZED STRING "FALSE"

 // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"

 // Retrieval info: CONSTANT: LPM_HINT STRING "RAM_BLOCK_TYPE=M4K"

-// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "128"

+// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "2048"

 // Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"

-// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo"

-// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "32"

-// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "7"

+// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo"

+// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"

+// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "11"

 // Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"

 // Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"

 // Retrieval info: CONSTANT: USE_EAB STRING "ON"

-// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND aclr

-// Retrieval info: USED_PORT: data 0 0 32 0 INPUT NODEFVAL data[31..0]

-// Retrieval info: USED_PORT: q 0 0 32 0 OUTPUT NODEFVAL q[31..0]

-// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL rdclk

-// Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL rdempty

-// Retrieval info: USED_PORT: rdfull 0 0 0 0 OUTPUT NODEFVAL rdfull

+// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr

+// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock

+// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0]

+// Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL empty

+// Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL full

+// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0]

 // Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq

-// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL wrclk

-// Retrieval info: USED_PORT: wrempty 0 0 0 0 OUTPUT NODEFVAL wrempty

-// Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL wrfull

+// Retrieval info: USED_PORT: usedw 0 0 11 0 OUTPUT NODEFVAL usedw[10..0]

 // Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq

-// Retrieval info: CONNECT: @data 0 0 32 0 data 0 0 32 0

-// Retrieval info: CONNECT: q 0 0 32 0 @q 0 0 32 0

+// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0

+// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0

 // Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0

 // Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0

-// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0

-// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0

-// Retrieval info: CONNECT: rdfull 0 0 0 0 @rdfull 0 0 0 0

-// Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0

-// Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0

-// Retrieval info: CONNECT: wrempty 0 0 0 0 @wrempty 0 0 0 0

+// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0

+// Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0

+// Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0

+// Retrieval info: CONNECT: usedw 0 0 11 0 @usedw 0 0 11 0

 // Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0

 // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512.v TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512.inc TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512.cmp TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512.bsf TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512_inst.v TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512_bb.v TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512_waveforms.html TRUE

-// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_512_wave*.jpg FALSE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16.inc TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16.cmp TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16.bsf TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16_inst.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16_bb.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16_waveforms.html TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2kx16_wave*.jpg FALSE

diff --git a/megacells/fifo_2kx16_inst.v b/megacells/fifo_2kx16_inst.v
new file mode 100755
index 000000000..6185c6fe6
--- /dev/null
+++ b/megacells/fifo_2kx16_inst.v
@@ -0,0 +1,11 @@
+fifo_2kx16	fifo_2kx16_inst (

+	.aclr ( aclr_sig ),

+	.clock ( clock_sig ),

+	.data ( data_sig ),

+	.rdreq ( rdreq_sig ),

+	.wrreq ( wrreq_sig ),

+	.empty ( empty_sig ),

+	.full ( full_sig ),

+	.q ( q_sig ),

+	.usedw ( usedw_sig )

+	);

diff --git a/megacells/fifo_4kx16.bsf b/megacells/fifo_4kx16.bsf
new file mode 100755
index 000000000..4d988c5e9
--- /dev/null
+++ b/megacells/fifo_4kx16.bsf
@@ -0,0 +1,99 @@
+/*

+WARNING: Do NOT edit the input and output ports in this file in a text

+editor if you plan to continue editing the block that represents it in

+the Block Editor! File corruption is VERY likely to occur.

+*/

+/*

+Copyright (C) 1991-2006 Altera Corporation

+Your use of Altera Corporation's design tools, logic functions 

+and other software and tools, and its AMPP partner logic 

+functions, and any output files any of the foregoing 

+(including device programming or simulation files), and any 

+associated documentation or information are expressly subject 

+to the terms and conditions of the Altera Program License 

+Subscription Agreement, Altera MegaCore Function License 

+Agreement, or other applicable license agreement, including, 

+without limitation, that your use is for the sole purpose of 

+programming logic devices manufactured by Altera and sold by 

+Altera or its authorized distributors.  Please refer to the 

+applicable agreement for further details.

+*/

+(header "symbol" (version "1.1"))

+(symbol

+	(rect 0 0 160 144)

+	(text "fifo_4kx16" (rect 51 1 119 17)(font "Arial" (font_size 10)))

+	(text "inst" (rect 8 128 25 140)(font "Arial" ))

+	(port

+		(pt 0 32)

+		(input)

+		(text "data[15..0]" (rect 0 0 60 14)(font "Arial" (font_size 8)))

+		(text "data[15..0]" (rect 20 26 71 39)(font "Arial" (font_size 8)))

+		(line (pt 0 32)(pt 16 32)(line_width 3))

+	)

+	(port

+		(pt 0 56)

+		(input)

+		(text "wrreq" (rect 0 0 35 14)(font "Arial" (font_size 8)))

+		(text "wrreq" (rect 20 50 45 63)(font "Arial" (font_size 8)))

+		(line (pt 0 56)(pt 16 56)(line_width 1))

+	)

+	(port

+		(pt 0 72)

+		(input)

+		(text "rdreq" (rect 0 0 30 14)(font "Arial" (font_size 8)))

+		(text "rdreq" (rect 20 66 44 79)(font "Arial" (font_size 8)))

+		(line (pt 0 72)(pt 16 72)(line_width 1))

+	)

+	(port

+		(pt 0 96)

+		(input)

+		(text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))

+		(text "clock" (rect 26 90 49 103)(font "Arial" (font_size 8)))

+		(line (pt 0 96)(pt 16 96)(line_width 1))

+	)

+	(port

+		(pt 0 120)

+		(input)

+		(text "aclr" (rect 0 0 21 14)(font "Arial" (font_size 8)))

+		(text "aclr" (rect 20 114 37 127)(font "Arial" (font_size 8)))

+		(line (pt 0 120)(pt 16 120)(line_width 1))

+	)

+	(port

+		(pt 160 32)

+		(output)

+		(text "q[15..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))

+		(text "q[15..0]" (rect 105 26 141 39)(font "Arial" (font_size 8)))

+		(line (pt 160 32)(pt 144 32)(line_width 3))

+	)

+	(port

+		(pt 160 56)

+		(output)

+		(text "full" (rect 0 0 16 14)(font "Arial" (font_size 8)))

+		(text "full" (rect 127 50 142 63)(font "Arial" (font_size 8)))

+		(line (pt 160 56)(pt 144 56)(line_width 1))

+	)

+	(port

+		(pt 160 72)

+		(output)

+		(text "empty" (rect 0 0 34 14)(font "Arial" (font_size 8)))

+		(text "empty" (rect 112 66 141 79)(font "Arial" (font_size 8)))

+		(line (pt 160 72)(pt 144 72)(line_width 1))

+	)

+	(port

+		(pt 160 88)

+		(output)

+		(text "usedw[11..0]" (rect 0 0 75 14)(font "Arial" (font_size 8)))

+		(text "usedw[11..0]" (rect 77 82 136 95)(font "Arial" (font_size 8)))

+		(line (pt 160 88)(pt 144 88)(line_width 3))

+	)

+	(drawing

+		(text "16 bits x 4096 words" (rect 58 116 144 128)(font "Arial" ))

+		(line (pt 16 16)(pt 144 16)(line_width 1))

+		(line (pt 144 16)(pt 144 128)(line_width 1))

+		(line (pt 144 128)(pt 16 128)(line_width 1))

+		(line (pt 16 128)(pt 16 16)(line_width 1))

+		(line (pt 16 108)(pt 144 108)(line_width 1))

+		(line (pt 16 90)(pt 22 96)(line_width 1))

+		(line (pt 22 96)(pt 16 102)(line_width 1))

+	)

+)

diff --git a/megacells/fifo_4kx16.cmp b/megacells/fifo_4kx16.cmp
new file mode 100755
index 000000000..7bc6941d7
--- /dev/null
+++ b/megacells/fifo_4kx16.cmp
@@ -0,0 +1,29 @@
+--Copyright (C) 1991-2006 Altera Corporation

+--Your use of Altera Corporation's design tools, logic functions 

+--and other software and tools, and its AMPP partner logic 

+--functions, and any output files any of the foregoing 

+--(including device programming or simulation files), and any 

+--associated documentation or information are expressly subject 

+--to the terms and conditions of the Altera Program License 

+--Subscription Agreement, Altera MegaCore Function License 

+--Agreement, or other applicable license agreement, including, 

+--without limitation, that your use is for the sole purpose of 

+--programming logic devices manufactured by Altera and sold by 

+--Altera or its authorized distributors.  Please refer to the 

+--applicable agreement for further details.

+

+

+component fifo_4kx16

+	PORT

+	(

+		aclr		: IN STD_LOGIC ;

+		clock		: IN STD_LOGIC ;

+		data		: IN STD_LOGIC_VECTOR (15 DOWNTO 0);

+		rdreq		: IN STD_LOGIC ;

+		wrreq		: IN STD_LOGIC ;

+		empty		: OUT STD_LOGIC ;

+		full		: OUT STD_LOGIC ;

+		q		: OUT STD_LOGIC_VECTOR (15 DOWNTO 0);

+		usedw		: OUT STD_LOGIC_VECTOR (11 DOWNTO 0)

+	);

+end component;

diff --git a/megacells/fifo_4kx16.inc b/megacells/fifo_4kx16.inc
new file mode 100755
index 000000000..db5d4f29e
--- /dev/null
+++ b/megacells/fifo_4kx16.inc
@@ -0,0 +1,30 @@
+--Copyright (C) 1991-2006 Altera Corporation

+--Your use of Altera Corporation's design tools, logic functions 

+--and other software and tools, and its AMPP partner logic 

+--functions, and any output files any of the foregoing 

+--(including device programming or simulation files), and any 

+--associated documentation or information are expressly subject 

+--to the terms and conditions of the Altera Program License 

+--Subscription Agreement, Altera MegaCore Function License 

+--Agreement, or other applicable license agreement, including, 

+--without limitation, that your use is for the sole purpose of 

+--programming logic devices manufactured by Altera and sold by 

+--Altera or its authorized distributors.  Please refer to the 

+--applicable agreement for further details.

+

+

+FUNCTION fifo_4kx16 

+(

+	aclr,

+	clock,

+	data[15..0],

+	rdreq,

+	wrreq

+)

+

+RETURNS (

+	empty,

+	full,

+	q[15..0],

+	usedw[11..0]

+);

diff --git a/megacells/fifo_4kx16.v b/megacells/fifo_4kx16.v
new file mode 100755
index 000000000..c5ecfbae7
--- /dev/null
+++ b/megacells/fifo_4kx16.v
@@ -0,0 +1,167 @@
+// megafunction wizard: %FIFO%

+// GENERATION: STANDARD

+// VERSION: WM1.0

+// MODULE: scfifo 

+

+// ============================================================

+// File Name: fifo_4kx16.v

+// Megafunction Name(s):

+// 			scfifo

+// ============================================================

+// ************************************************************

+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!

+//

+// 5.1 Build 213 01/19/2006 SP 1 SJ Web Edition

+// ************************************************************

+

+

+//Copyright (C) 1991-2006 Altera Corporation

+//Your use of Altera Corporation's design tools, logic functions 

+//and other software and tools, and its AMPP partner logic 

+//functions, and any output files any of the foregoing 

+//(including device programming or simulation files), and any 

+//associated documentation or information are expressly subject 

+//to the terms and conditions of the Altera Program License 

+//Subscription Agreement, Altera MegaCore Function License 

+//Agreement, or other applicable license agreement, including, 

+//without limitation, that your use is for the sole purpose of 

+//programming logic devices manufactured by Altera and sold by 

+//Altera or its authorized distributors.  Please refer to the 

+//applicable agreement for further details.

+

+

+// synopsys translate_off

+`timescale 1 ps / 1 ps

+// synopsys translate_on

+module fifo_4kx16 (

+	aclr,

+	clock,

+	data,

+	rdreq,

+	wrreq,

+	empty,

+	full,

+	q,

+	usedw);

+

+	input	  aclr;

+	input	  clock;

+	input	[15:0]  data;

+	input	  rdreq;

+	input	  wrreq;

+	output	  empty;

+	output	  full;

+	output	[15:0]  q;

+	output	[11:0]  usedw;

+

+	wire [11:0] sub_wire0;

+	wire  sub_wire1;

+	wire [15:0] sub_wire2;

+	wire  sub_wire3;

+	wire [11:0] usedw = sub_wire0[11:0];

+	wire  empty = sub_wire1;

+	wire [15:0] q = sub_wire2[15:0];

+	wire  full = sub_wire3;

+

+	scfifo	scfifo_component (

+				.rdreq (rdreq),

+				.aclr (aclr),

+				.clock (clock),

+				.wrreq (wrreq),

+				.data (data),

+				.usedw (sub_wire0),

+				.empty (sub_wire1),

+				.q (sub_wire2),

+				.full (sub_wire3)

+				// synopsys translate_off

+				,

+				.almost_empty (),

+				.sclr (),

+				.almost_full ()

+				// synopsys translate_on

+				);

+	defparam

+		scfifo_component.add_ram_output_register = "OFF",

+		scfifo_component.intended_device_family = "Cyclone",

+		scfifo_component.lpm_hint = "RAM_BLOCK_TYPE=M4K",

+		scfifo_component.lpm_numwords = 4096,

+		scfifo_component.lpm_showahead = "OFF",

+		scfifo_component.lpm_type = "scfifo",

+		scfifo_component.lpm_width = 16,

+		scfifo_component.lpm_widthu = 12,

+		scfifo_component.overflow_checking = "ON",

+		scfifo_component.underflow_checking = "ON",

+		scfifo_component.use_eab = "ON";

+

+

+endmodule

+

+// ============================================================

+// CNX file retrieval info

+// ============================================================

+// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"

+// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"

+// Retrieval info: PRIVATE: AlmostFull NUMERIC "0"

+// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"

+// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"

+// Retrieval info: PRIVATE: Clock NUMERIC "0"

+// Retrieval info: PRIVATE: Depth NUMERIC "4096"

+// Retrieval info: PRIVATE: Empty NUMERIC "1"

+// Retrieval info: PRIVATE: Full NUMERIC "1"

+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"

+// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"

+// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1"

+// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"

+// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"

+// Retrieval info: PRIVATE: Optimize NUMERIC "2"

+// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "2"

+// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"

+// Retrieval info: PRIVATE: UsedW NUMERIC "1"

+// Retrieval info: PRIVATE: Width NUMERIC "16"

+// Retrieval info: PRIVATE: dc_aclr NUMERIC "0"

+// Retrieval info: PRIVATE: rsEmpty NUMERIC "1"

+// Retrieval info: PRIVATE: rsFull NUMERIC "0"

+// Retrieval info: PRIVATE: rsUsedW NUMERIC "0"

+// Retrieval info: PRIVATE: sc_aclr NUMERIC "1"

+// Retrieval info: PRIVATE: sc_sclr NUMERIC "0"

+// Retrieval info: PRIVATE: wsEmpty NUMERIC "0"

+// Retrieval info: PRIVATE: wsFull NUMERIC "1"

+// Retrieval info: PRIVATE: wsUsedW NUMERIC "0"

+// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF"

+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"

+// Retrieval info: CONSTANT: LPM_HINT STRING "RAM_BLOCK_TYPE=M4K"

+// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "4096"

+// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"

+// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo"

+// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"

+// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "12"

+// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"

+// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"

+// Retrieval info: CONSTANT: USE_EAB STRING "ON"

+// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr

+// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock

+// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0]

+// Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL empty

+// Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL full

+// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0]

+// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq

+// Retrieval info: USED_PORT: usedw 0 0 12 0 OUTPUT NODEFVAL usedw[11..0]

+// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq

+// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0

+// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0

+// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0

+// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0

+// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0

+// Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0

+// Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0

+// Retrieval info: CONNECT: usedw 0 0 12 0 @usedw 0 0 12 0

+// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0

+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16.inc TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16.cmp TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16.bsf TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16_inst.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16_bb.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16_waveforms.html TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16_wave*.jpg FALSE

diff --git a/megacells/fifo_4kx16_bb.v b/megacells/fifo_4kx16_bb.v
new file mode 100755
index 000000000..d41e9f090
--- /dev/null
+++ b/megacells/fifo_4kx16_bb.v
@@ -0,0 +1,122 @@
+// megafunction wizard: %FIFO%VBB%

+// GENERATION: STANDARD

+// VERSION: WM1.0

+// MODULE: scfifo 

+

+// ============================================================

+// File Name: fifo_4kx16.v

+// Megafunction Name(s):

+// 			scfifo

+// ============================================================

+// ************************************************************

+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!

+//

+// 5.1 Build 213 01/19/2006 SP 1 SJ Web Edition

+// ************************************************************

+

+//Copyright (C) 1991-2006 Altera Corporation

+//Your use of Altera Corporation's design tools, logic functions 

+//and other software and tools, and its AMPP partner logic 

+//functions, and any output files any of the foregoing 

+//(including device programming or simulation files), and any 

+//associated documentation or information are expressly subject 

+//to the terms and conditions of the Altera Program License 

+//Subscription Agreement, Altera MegaCore Function License 

+//Agreement, or other applicable license agreement, including, 

+//without limitation, that your use is for the sole purpose of 

+//programming logic devices manufactured by Altera and sold by 

+//Altera or its authorized distributors.  Please refer to the 

+//applicable agreement for further details.

+

+module fifo_4kx16 (

+	aclr,

+	clock,

+	data,

+	rdreq,

+	wrreq,

+	empty,

+	full,

+	q,

+	usedw);

+

+	input	  aclr;

+	input	  clock;

+	input	[15:0]  data;

+	input	  rdreq;

+	input	  wrreq;

+	output	  empty;

+	output	  full;

+	output	[15:0]  q;

+	output	[11:0]  usedw;

+

+endmodule

+

+// ============================================================

+// CNX file retrieval info

+// ============================================================

+// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0"

+// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1"

+// Retrieval info: PRIVATE: AlmostFull NUMERIC "0"

+// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"

+// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"

+// Retrieval info: PRIVATE: Clock NUMERIC "0"

+// Retrieval info: PRIVATE: Depth NUMERIC "4096"

+// Retrieval info: PRIVATE: Empty NUMERIC "1"

+// Retrieval info: PRIVATE: Full NUMERIC "1"

+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"

+// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0"

+// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "1"

+// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0"

+// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "0"

+// Retrieval info: PRIVATE: Optimize NUMERIC "2"

+// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "2"

+// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "0"

+// Retrieval info: PRIVATE: UsedW NUMERIC "1"

+// Retrieval info: PRIVATE: Width NUMERIC "16"

+// Retrieval info: PRIVATE: dc_aclr NUMERIC "0"

+// Retrieval info: PRIVATE: rsEmpty NUMERIC "1"

+// Retrieval info: PRIVATE: rsFull NUMERIC "0"

+// Retrieval info: PRIVATE: rsUsedW NUMERIC "0"

+// Retrieval info: PRIVATE: sc_aclr NUMERIC "1"

+// Retrieval info: PRIVATE: sc_sclr NUMERIC "0"

+// Retrieval info: PRIVATE: wsEmpty NUMERIC "0"

+// Retrieval info: PRIVATE: wsFull NUMERIC "1"

+// Retrieval info: PRIVATE: wsUsedW NUMERIC "0"

+// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF"

+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"

+// Retrieval info: CONSTANT: LPM_HINT STRING "RAM_BLOCK_TYPE=M4K"

+// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "4096"

+// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "OFF"

+// Retrieval info: CONSTANT: LPM_TYPE STRING "scfifo"

+// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"

+// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "12"

+// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"

+// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"

+// Retrieval info: CONSTANT: USE_EAB STRING "ON"

+// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr

+// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock

+// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0]

+// Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL empty

+// Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL full

+// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0]

+// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq

+// Retrieval info: USED_PORT: usedw 0 0 12 0 OUTPUT NODEFVAL usedw[11..0]

+// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq

+// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0

+// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0

+// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0

+// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0

+// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0

+// Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0

+// Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0

+// Retrieval info: CONNECT: usedw 0 0 12 0 @usedw 0 0 12 0

+// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0

+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16.inc TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16.cmp TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16.bsf TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16_inst.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16_bb.v TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16_waveforms.html TRUE

+// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4kx16_wave*.jpg FALSE

diff --git a/megacells/fifo_4kx16_inst.v b/megacells/fifo_4kx16_inst.v
new file mode 100755
index 000000000..eb260acaa
--- /dev/null
+++ b/megacells/fifo_4kx16_inst.v
@@ -0,0 +1,11 @@
+fifo_4kx16	fifo_4kx16_inst (

+	.aclr ( aclr_sig ),

+	.clock ( clock_sig ),

+	.data ( data_sig ),

+	.rdreq ( rdreq_sig ),

+	.wrreq ( wrreq_sig ),

+	.empty ( empty_sig ),

+	.full ( full_sig ),

+	.q ( q_sig ),

+	.usedw ( usedw_sig )

+	);

diff --git a/megacells/fifo_512.bsf b/megacells/fifo_512.bsf
deleted file mode 100755
index a955b5655..000000000
--- a/megacells/fifo_512.bsf
+++ /dev/null
@@ -1,116 +0,0 @@
-/*

-WARNING: Do NOT edit the input and output ports in this file in a text

-editor if you plan to continue editing the block that represents it in

-the Block Editor! File corruption is VERY likely to occur.

-*/

-/*

-Copyright (C) 1991-2006 Altera Corporation

-Your use of Altera Corporation's design tools, logic functions 

-and other software and tools, and its AMPP partner logic 

-functions, and any output files any of the foregoing 

-(including device programming or simulation files), and any 

-associated documentation or information are expressly subject 

-to the terms and conditions of the Altera Program License 

-Subscription Agreement, Altera MegaCore Function License 

-Agreement, or other applicable license agreement, including, 

-without limitation, that your use is for the sole purpose of 

-programming logic devices manufactured by Altera and sold by 

-Altera or its authorized distributors.  Please refer to the 

-applicable agreement for further details.

-*/

-(header "symbol" (version "1.1"))

-(symbol

-	(rect 0 0 160 184)

-	(text "fifo_512" (rect 58 1 109 17)(font "Arial" (font_size 10)))

-	(text "inst" (rect 8 168 25 180)(font "Arial" ))

-	(port

-		(pt 0 32)

-		(input)

-		(text "data[31..0]" (rect 0 0 60 14)(font "Arial" (font_size 8)))

-		(text "data[31..0]" (rect 20 26 71 39)(font "Arial" (font_size 8)))

-		(line (pt 0 32)(pt 16 32)(line_width 3))

-	)

-	(port

-		(pt 0 56)

-		(input)

-		(text "wrreq" (rect 0 0 35 14)(font "Arial" (font_size 8)))

-		(text "wrreq" (rect 20 50 45 63)(font "Arial" (font_size 8)))

-		(line (pt 0 56)(pt 16 56)(line_width 1))

-	)

-	(port

-		(pt 0 72)

-		(input)

-		(text "wrclk" (rect 0 0 31 14)(font "Arial" (font_size 8)))

-		(text "wrclk" (rect 26 66 48 79)(font "Arial" (font_size 8)))

-		(line (pt 0 72)(pt 16 72)(line_width 1))

-	)

-	(port

-		(pt 0 104)

-		(input)

-		(text "rdreq" (rect 0 0 30 14)(font "Arial" (font_size 8)))

-		(text "rdreq" (rect 20 98 44 111)(font "Arial" (font_size 8)))

-		(line (pt 0 104)(pt 16 104)(line_width 1))

-	)

-	(port

-		(pt 0 120)

-		(input)

-		(text "rdclk" (rect 0 0 27 14)(font "Arial" (font_size 8)))

-		(text "rdclk" (rect 26 114 47 127)(font "Arial" (font_size 8)))

-		(line (pt 0 120)(pt 16 120)(line_width 1))

-	)

-	(port

-		(pt 0 160)

-		(input)

-		(text "aclr" (rect 0 0 21 14)(font "Arial" (font_size 8)))

-		(text "aclr" (rect 20 154 37 167)(font "Arial" (font_size 8)))

-		(line (pt 0 160)(pt 16 160)(line_width 1))

-	)

-	(port

-		(pt 160 40)

-		(output)

-		(text "wrfull" (rect 0 0 33 14)(font "Arial" (font_size 8)))

-		(text "wrfull" (rect 113 34 138 47)(font "Arial" (font_size 8)))

-		(line (pt 160 40)(pt 144 40)(line_width 1))

-	)

-	(port

-		(pt 160 56)

-		(output)

-		(text "wrempty" (rect 0 0 50 14)(font "Arial" (font_size 8)))

-		(text "wrempty" (rect 98 50 137 63)(font "Arial" (font_size 8)))

-		(line (pt 160 56)(pt 144 56)(line_width 1))

-	)

-	(port

-		(pt 160 96)

-		(output)

-		(text "q[31..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))

-		(text "q[31..0]" (rect 105 90 141 103)(font "Arial" (font_size 8)))

-		(line (pt 160 96)(pt 144 96)(line_width 3))

-	)

-	(port

-		(pt 160 120)

-		(output)

-		(text "rdfull" (rect 0 0 28 14)(font "Arial" (font_size 8)))

-		(text "rdfull" (rect 117 114 141 127)(font "Arial" (font_size 8)))

-		(line (pt 160 120)(pt 144 120)(line_width 1))

-	)

-	(port

-		(pt 160 136)

-		(output)

-		(text "rdempty" (rect 0 0 46 14)(font "Arial" (font_size 8)))

-		(text "rdempty" (rect 102 130 140 143)(font "Arial" (font_size 8)))

-		(line (pt 160 136)(pt 144 136)(line_width 1))

-	)

-	(drawing

-		(text "32 bits x 128 words" (rect 63 156 144 168)(font "Arial" ))

-		(line (pt 16 16)(pt 144 16)(line_width 1))

-		(line (pt 144 16)(pt 144 168)(line_width 1))

-		(line (pt 144 168)(pt 16 168)(line_width 1))

-		(line (pt 16 168)(pt 16 16)(line_width 1))

-		(line (pt 16 84)(pt 144 84)(line_width 1))

-		(line (pt 16 148)(pt 144 148)(line_width 1))

-		(line (pt 16 66)(pt 22 72)(line_width 1))

-		(line (pt 22 72)(pt 16 78)(line_width 1))

-		(line (pt 16 114)(pt 22 120)(line_width 1))

-		(line (pt 22 120)(pt 16 126)(line_width 1))

-	)

-)