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| author | Moritz Fischer <moritz.fischer@ettus.com> | 2018-01-25 10:46:17 -0800 |
|---|---|---|
| committer | Ashish Chaudhari <ashish.chaudhari@ettus.com> | 2018-02-07 16:47:50 -0800 |
| commit | 2e6146707bcdbcb047f58b0f6e3199c612a598a2 (patch) | |
| tree | 635575813d13a3e0adda709c4fb67ac42ee32575 /images | |
| parent | be0df323ca8eccee6abb19d54ebdd0cbbe12d9a4 (diff) | |
| download | uhd-2e6146707bcdbcb047f58b0f6e3199c612a598a2.tar.gz uhd-2e6146707bcdbcb047f58b0f6e3199c612a598a2.tar.bz2 uhd-2e6146707bcdbcb047f58b0f6e3199c612a598a2.zip | |
mpm: magnesium_update_cpld.py: Add axi_bitq support
Add axi_bitq support. In order for this to work we need several
conditions to be true:
- Updated openocd
- FPGA image with axi_bitq built in and hooked up to correct pins
- Updated overlays matching the FPGA image
- An svf file with correct max frequency <= 10MHz
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Diffstat (limited to 'images')
0 files changed, 0 insertions, 0 deletions