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authorMichael West <michael.west@ettus.com>2019-03-25 09:33:42 -0700
committerMichael West <michael.west@ettus.com>2019-03-25 09:41:43 -0700
commite7acb0567fe5d49cb0634b926bdb3e9146d3c5b0 (patch)
tree5dd643c760044a7d6eec9e76acd374e6da55ea4f /images
parentb772c98717554dca5f58a149917257da5c6a4d8c (diff)
downloaduhd-e7acb0567fe5d49cb0634b926bdb3e9146d3c5b0.tar.gz
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Revert b993f4f0d85eee53c1256e0381c3a173af7d5833
Revert "cores: Update rx_frontend_gen3.v controls for 1/4-rate mixer" Commit introduced 180 degree ambiguity in TwinRX phase alignment.
Diffstat (limited to 'images')
-rw-r--r--images/manifest.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/images/manifest.txt b/images/manifest.txt
index d0bb79ce6..9556e6e02 100644
--- a/images/manifest.txt
+++ b/images/manifest.txt
@@ -1,8 +1,8 @@
# UHD Image Manifest File
# Target hash url SHA256
# X300-Series
-x3xx_x310_fpga_default fpga-3de8954a x3xx/fpga-3de8954a/x3xx_x310_fpga_default-g3de8954a.zip cd6a1ddfbc5e2deff8d3c5c157d22945eff4004116fc8b5763b36c346b328bbf
-x3xx_x300_fpga_default fpga-3de8954a x3xx/fpga-3de8954a/x3xx_x300_fpga_default-g3de8954a.zip e1a542656131b2a1b17db70df69757efc25811831ff43c5ab47cc5988573ddf7
+x3xx_x310_fpga_default fpga-f1ba32fe x3xx/fpga-f1ba32fe/x3xx_x310_fpga_default-gf1ba32fe.zip 7ff752d3ee01ad3aa62dd405f8afbaaf30c5e77d22effe1c9d55f94b03d37326
+x3xx_x300_fpga_default fpga-f1ba32fe x3xx/fpga-f1ba32fe/x3xx_x300_fpga_default-gf1ba32fe.zip ff3e0416f36170bfa83a7d47dc6164e60cfad1277d0f221e3c69a25e6f21323b
# Example daughterboard targets (none currently exist)
#x3xx_twinrx_cpld_default example_target
#dboard_ubx_cpld_default example_target