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| author | Martin Braun <martin.braun@ettus.com> | 2018-04-02 13:33:40 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2018-04-02 15:22:32 -0700 |
| commit | c7f52870805c9d9f79f15c80e9a4ad53ed88c857 (patch) | |
| tree | a7037f24a7724486c8b146d141b27351fff85b4f /images | |
| parent | 6e66bd7d7b64e52d013bfd3f10f20bb122a82421 (diff) | |
| download | uhd-c7f52870805c9d9f79f15c80e9a4ad53ed88c857.tar.gz uhd-c7f52870805c9d9f79f15c80e9a4ad53ed88c857.tar.bz2 uhd-c7f52870805c9d9f79f15c80e9a4ad53ed88c857.zip | |
images: Move WX back into default set
Diffstat (limited to 'images')
| -rw-r--r-- | images/image_package_mapping.py | 32 |
1 files changed, 12 insertions, 20 deletions
diff --git a/images/image_package_mapping.py b/images/image_package_mapping.py index 19d645bb0..641537823 100644 --- a/images/image_package_mapping.py +++ b/images/image_package_mapping.py @@ -60,7 +60,12 @@ PACKAGE_MAPPING = { 'usrp_n310_fpga_XG.bit.md5', 'usrp_n310_fpga_XG.dts', 'usrp_n310_fpga_XG.dts.md5', - 'usrp_n310_fpga_XG.rpt'] + 'usrp_n310_fpga_XG.rpt', + 'usrp_n310_fpga_WX.bit', + 'usrp_n310_fpga_WX.bit.md5', + 'usrp_n310_fpga_WX.dts', + 'usrp_n310_fpga_WX.dts.md5', + 'usrp_n310_fpga_WX.rpt',], }, "n300": { "type": "n3xx", @@ -74,7 +79,12 @@ PACKAGE_MAPPING = { 'usrp_n300_fpga_XG.bit.md5', 'usrp_n300_fpga_XG.dts', 'usrp_n300_fpga_XG.dts.md5', - 'usrp_n300_fpga_XG.rpt'] + 'usrp_n300_fpga_XG.rpt', + 'usrp_n300_fpga_WX.bit', + 'usrp_n300_fpga_WX.bit.md5', + 'usrp_n300_fpga_WX.dts', + 'usrp_n300_fpga_WX.dts.md5', + 'usrp_n300_fpga_WX.rpt',], }, "n310_aa": { "type": "n3xx", @@ -95,24 +105,6 @@ PACKAGE_MAPPING = { 'usrp_n310_fpga_XA.dts.md5', 'usrp_n310_fpga_XA.rpt'] }, - "n310_wr": { - "type": "n3xx", - "package_name": "n3xx_n310_fpga_whiterabbit-g{}.zip", - "files": ['usrp_n310_fpga_WX.bit', - 'usrp_n310_fpga_WX.bit.md5', - 'usrp_n310_fpga_WX.dts', - 'usrp_n310_fpga_WX.dts.md5', - 'usrp_n310_fpga_WX.rpt',] - }, - "n300_wr": { - "type": "n3xx", - "package_name": "n3xx_n300_fpga_whiterabbit-g{}.zip", - "files": ['usrp_n300_fpga_WX.bit', - 'usrp_n300_fpga_WX.bit.md5', - 'usrp_n300_fpga_WX.dts', - 'usrp_n300_fpga_WX.dts.md5', - 'usrp_n300_fpga_WX.rpt',] - }, "n310_cpld": { "type": "n3xx", "package_name": "n3xx_n310_cpld_default-g{}.zip", |