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| author | Ashish Chaudhari <ashish@ettus.com> | 2018-02-23 10:45:26 -0800 |
|---|---|---|
| committer | Ashish Chaudhari <ashish@ettus.com> | 2018-02-23 14:13:44 -0800 |
| commit | c0a09e2f060045fb2954cc2194ac7eb48a873e4b (patch) | |
| tree | 9dbdc1860fa911658b822888fb84182ca4589663 /images/manifest.txt | |
| parent | 9f67f624ad9de979aa1427b9bc91db15285c6c57 (diff) | |
| download | uhd-c0a09e2f060045fb2954cc2194ac7eb48a873e4b.tar.gz uhd-c0a09e2f060045fb2954cc2194ac7eb48a873e4b.tar.bz2 uhd-c0a09e2f060045fb2954cc2194ac7eb48a873e4b.zip | |
x300: Fixed processor clock rate in ZPU firmware
- Fix for regression that was introduced after the bus_clk freq change
- Firmware compat number bumped to 6.0 (was 5.2)
Diffstat (limited to 'images/manifest.txt')
| -rw-r--r-- | images/manifest.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/images/manifest.txt b/images/manifest.txt index f0a9fdcc0..5e20d35ad 100644 --- a/images/manifest.txt +++ b/images/manifest.txt @@ -1,8 +1,8 @@ # UHD Image Manifest File # Target hash url SHA256 # X300-Series -x3xx_x310_fpga_default fpga-1c568e6 x3xx/fpga-1c568e6/x3xx_x310_fpga_default.zip d441d1b51c2b4f12fd83b09b0d1937265f8b537dfb98f5a0e7bfe611a53abb7e -x3xx_x300_fpga_default fpga-1c568e6 x3xx/fpga-1c568e6/x3xx_x300_fpga_default.zip e2413b6690029481991155d79e760d2e68a443df0e7cb95672083737424837db +x3xx_x310_fpga_default fpga-1791847 x3xx/fpga-1791847/x3xx_x310_fpga_default.zip b18622e48f8a7e762c07ec90a563a5925f6098fe9a905fe1689c246696678142 +x3xx_x300_fpga_default fpga-1791847 x3xx/fpga-1791847/x3xx_x300_fpga_default.zip 2e184533f90abe17ce931848c8d2ca628b497399ac9bdd069f685ba9ce50aa3c # Example daughterboard targets (none currently exist) #x3xx_twinrx_cpld_default example_target #dboard_ubx_cpld_default example_target |