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authormichael-west <michael.west@ettus.com>2021-08-13 14:18:11 -0700
committerAaron Rossetto <aaron.rossetto@ni.com>2021-08-16 15:42:05 -0500
commit81a9cc1f8751d4f51778928d2f69547bdfcb4f1a (patch)
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N320: Reduce PLL lock time
- Reduce PLL1 DLD lock count to 4,000 (0xFA0), or 100ms - Change loop to check for lock every 10ms Signed-off-by: michael-west <michael.west@ettus.com>
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