diff options
| author | Brent Stapleton <brent.stapleton@ettus.com> | 2018-02-01 17:05:10 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2018-02-02 07:06:09 +0100 |
| commit | 478c0530ca7a75285e9966c85d085c058a757245 (patch) | |
| tree | 10a11ae2171aec285f1f0d09eca917c5d1474637 /images/manifest.txt | |
| parent | 2cf067271ae8553cb7a7c2f7d9f19d8b6d7d2ab5 (diff) | |
| download | uhd-478c0530ca7a75285e9966c85d085c058a757245.tar.gz uhd-478c0530ca7a75285e9966c85d085c058a757245.tar.bz2 uhd-478c0530ca7a75285e9966c85d085c058a757245.zip | |
fixup! usrp3: Changes for Vivado 2017.4
Diffstat (limited to 'images/manifest.txt')
| -rw-r--r-- | images/manifest.txt | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/images/manifest.txt b/images/manifest.txt index 188cf1d6e..64211b0c6 100644 --- a/images/manifest.txt +++ b/images/manifest.txt @@ -1,13 +1,13 @@ # UHD Image Manifest File # Target hash url SHA256 # X300-Series -x3xx_x310_fpga_default fpga-30cc152 x3xx/fpga-30cc152/x3xx_x310_fpga_default.zip f16cb4d753e138294ddbe70158a9eafe6b0ac3847575080b042118b84f15dcef -x3xx_x300_fpga_default fpga-30cc152 x3xx/fpga-30cc152/x3xx_x300_fpga_default.zip ee94fe3aef3b83357859304e05354baf4f51efe2415dfe5c69768d1ee9f095bf +x3xx_x310_fpga_default fpga-30cc152 x3xx/fpga-30cc152/x3xx_x310_fpga_default.zip 0a7a410013ab83efca8101defc7bcb5346e74a03b6412e8d9077b3b5728b93f5 +x3xx_x300_fpga_default fpga-30cc152 x3xx/fpga-30cc152/x3xx_x300_fpga_default.zip c4814bc948a1ce06ccc85ed6c58c4946e12a150a27ce3fc94080f7ff98669f2f # Example daughterboard targets (none currently exist) #x3xx_twinrx_cpld_default example_target #dboard_ubx_cpld_default example_target # E-Series -e3xx_e310_fpga_default fpga-30cc152 e3xx/fpga-30cc152/e3xx_e310_fpga_default.zip 766afe38a4703c1974976893043448b82a574eb0f85303efcc03f654cbc0249a +e3xx_e310_fpga_default fpga-30cc152 e3xx/fpga-30cc152/e3xx_e310_fpga_default.zip c2c996190be6c4ada2e176a0e2b647dfe7a56100cc3c140ca5bc702411747530 # N300-Series n3xx_n310_fpga_default fpga-30cc152 n3xx/fpga-30cc152/n3xx_n310_fpga_default.zip ca5667287913f37fe77480b9d309b102d525ff904b4ccfb70455d4ce93595d2c n3xx_n310_fpga_aurora fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_fpga_aurora.zip c5327bb903e0797568e9b773f4d56bae9ce973a3db6e942b8027aa1ac71cf1e1 @@ -33,7 +33,7 @@ usrp2_n200_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n20 usrp2_n200_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n200_fw_default.zip 3eee2a6195caafe814912167fccf2dfc369f706446f8ecee36e97d2c0830116f usrp2_n210_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fpga_default.zip 5ce68ac539ee6eeb7d04fb3127c1fabcaff442a8edfaaa2f3746590f9df909bd usrp2_n210_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fw_default.zip 3646fcd3fc974d18c621cb10dfe97c4dad6d282036dc63b7379995dfad95fb98 -n230_n230_fpga_default fpga-30cc152 n230/fpga-30cc152/n230_n230_fpga_default.zip 23166d04f3a092fb5aaeefe1a2e76bf7dcbc8c0a1b06a67798c77d1e1d5e748a +n230_n230_fpga_default fpga-30cc152 n230/fpga-30cc152/n230_n230_fpga_default.zip 2027230401449bdfa9753ee41121d8b5e5ba28204a2ef8f8e130492152a18233 # USRP1 Devices usrp1_usrp1_fpga_default fpga-6bea23d usrp1/fpga-6bea23d/usrp1_usrp1_fpga_default.zip 03bf72868c900dd0853bf48e2ede91058d579829b0e70c021e51b0e282d1d5be usrp1_b100_fpga_default fpga-6bea23d usrp1/fpga-6bea23d/usrp1_b100_fpga_default.zip 7f2306f21e17aa3fae3f966d08c6297d6cf42041974f846ca89f0d633ece8769 |