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author | Brent Stapleton <brent.stapleton@ettus.com> | 2018-11-01 10:00:09 -0700 |
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committer | Brent Stapleton <bstapleton@g.hmc.edu> | 2018-11-14 15:54:05 -0800 |
commit | d61848e1095983b60bc0abb7b432146f00191f27 (patch) | |
tree | debcb8ec165461233f96e3006a4831ed56796583 /images/image_package_mapping.py | |
parent | 8665b0e5e6aba6dc24ca44f7f4e12ab700c69cdb (diff) | |
download | uhd-d61848e1095983b60bc0abb7b432146f00191f27.tar.gz uhd-d61848e1095983b60bc0abb7b432146f00191f27.tar.bz2 uhd-d61848e1095983b60bc0abb7b432146f00191f27.zip |
n3xx: removing HA, XA image packages
- Removing the Aurora image package from the images manifest. It was
previously commented out, and hasn't been updated, so we're not
actually losing anything here.
- Moving the N310 and N300 _AA image to the _default image package
Diffstat (limited to 'images/image_package_mapping.py')
-rw-r--r-- | images/image_package_mapping.py | 60 |
1 files changed, 14 insertions, 46 deletions
diff --git a/images/image_package_mapping.py b/images/image_package_mapping.py index ee5361aea..eeea4e777 100644 --- a/images/image_package_mapping.py +++ b/images/image_package_mapping.py @@ -36,12 +36,8 @@ PACKAGE_MAPPING = { 'usrp_e320_fpga_XG.bit.md5', 'usrp_e320_fpga_XG.dts', 'usrp_e320_fpga_XG.dts.md5', - 'usrp_e320_fpga_XG.rpt'] - }, - "e320_aa": { - "type": "e3xx", - "package_name": "e3xx_e320_fpga_aurora-g{}.zip", - "files": ['usrp_e320_fpga_AA.bit', + 'usrp_e320_fpga_XG.rpt', + 'usrp_e320_fpga_AA.bit', 'usrp_e320_fpga_AA.bit.md5', 'usrp_e320_fpga_AA.dts', 'usrp_e320_fpga_AA.dts.md5', @@ -84,7 +80,12 @@ PACKAGE_MAPPING = { 'usrp_n310_fpga_WX.bit.md5', 'usrp_n310_fpga_WX.dts', 'usrp_n310_fpga_WX.dts.md5', - 'usrp_n310_fpga_WX.rpt',], + 'usrp_n310_fpga_WX.rpt', + 'usrp_n310_fpga_AA.bit', + 'usrp_n310_fpga_AA.bit.md5', + 'usrp_n310_fpga_AA.dts', + 'usrp_n310_fpga_AA.dts.md5', + 'usrp_n310_fpga_AA.rpt'], }, "n300": { "type": "n3xx", @@ -103,7 +104,12 @@ PACKAGE_MAPPING = { 'usrp_n300_fpga_WX.bit.md5', 'usrp_n300_fpga_WX.dts', 'usrp_n300_fpga_WX.dts.md5', - 'usrp_n300_fpga_WX.rpt',], + 'usrp_n300_fpga_WX.rpt', + 'usrp_n300_fpga_AA.bit', + 'usrp_n300_fpga_AA.bit.md5', + 'usrp_n300_fpga_AA.dts', + 'usrp_n300_fpga_AA.dts.md5', + 'usrp_n300_fpga_AA.rpt'], }, "n320": { "type": "n3xx", @@ -129,44 +135,6 @@ PACKAGE_MAPPING = { 'usrp_n320_fpga_AQ.dts.md5', 'usrp_n320_fpga_AQ.rpt',], }, - "n310_aa": { - "type": "n3xx", - "package_name": "n3xx_n310_fpga_aurora-g{}.zip", - "files": ['usrp_n310_fpga_AA.bit', - 'usrp_n310_fpga_AA.bit.md5', - 'usrp_n310_fpga_AA.dts', - 'usrp_n310_fpga_AA.dts.md5', - 'usrp_n310_fpga_AA.rpt', - 'usrp_n310_fpga_HA.bit', - 'usrp_n310_fpga_HA.bit.md5', - 'usrp_n310_fpga_HA.dts', - 'usrp_n310_fpga_HA.dts.md5', - 'usrp_n310_fpga_HA.rpt', - 'usrp_n310_fpga_XA.bit', - 'usrp_n310_fpga_XA.bit.md5', - 'usrp_n310_fpga_XA.dts', - 'usrp_n310_fpga_XA.dts.md5', - 'usrp_n310_fpga_XA.rpt'] - }, - "n300_aa": { - "type": "n3xx", - "package_name": "n3xx_n300_fpga_aurora-g{}.zip", - "files": ['usrp_n300_fpga_AA.bit', - 'usrp_n300_fpga_AA.bit.md5', - 'usrp_n300_fpga_AA.dts', - 'usrp_n300_fpga_AA.dts.md5', - 'usrp_n300_fpga_AA.rpt', - 'usrp_n300_fpga_HA.bit', - 'usrp_n300_fpga_HA.bit.md5', - 'usrp_n300_fpga_HA.dts', - 'usrp_n300_fpga_HA.dts.md5', - 'usrp_n300_fpga_HA.rpt', - 'usrp_n300_fpga_XA.bit', - 'usrp_n300_fpga_XA.bit.md5', - 'usrp_n300_fpga_XA.dts', - 'usrp_n300_fpga_XA.dts.md5', - 'usrp_n300_fpga_XA.rpt'] - }, "n320_cpld": { "type": "n3xx", "package_name": "n3xx_n320_cpld_default-g{}.zip", |