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authorPhilip Balister <philip@opensdr.com>2011-03-14 03:13:56 -0700
committerPhilip Balister <philip@opensdr.com>2011-03-14 03:13:56 -0700
commitc6c65f5069815df664e4636f5beb661ad85e0d72 (patch)
tree24f70182aaba406f9b13c7d28dbb0bdcf1307254 /host
parente5b625a59b047481e648a3d9f8871e226d6ab7aa (diff)
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usrp_e : Remove commented out FPGA reset code.
The reset is done in the device driver open. Reseting from uhd is bad because the driver has to re-initialize the spi and i2c controllers after resetting the fpga.
Diffstat (limited to 'host')
-rw-r--r--host/lib/usrp/usrp_e100/usrp_e100_iface.cpp3
1 files changed, 0 insertions, 3 deletions
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_iface.cpp b/host/lib/usrp/usrp_e100/usrp_e100_iface.cpp
index 45e57f301..ec0baf490 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_iface.cpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_iface.cpp
@@ -109,9 +109,6 @@ public:
throw uhd::io_error("Failed to open " + node);
}
- //very first thing, reset all the wishbone, always do first!
- //disabled for now: this->poke32(UE_REG_CLEAR_GLOBAL, 0);
-
mb_eeprom = mboard_eeprom_t(get_i2c_dev_iface(), mboard_eeprom_t::MAP_E100);
}