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authorNick Foster <nick@nerdnetworks.org>2010-10-20 18:31:31 -0700
committerNick Foster <nick@nerdnetworks.org>2010-10-20 18:31:31 -0700
commit2f6ab109231667ee255d2ba7cba34a0519019dc9 (patch)
treec140c53c6af5624bcc4262245bf88c9d1d24ddba /host
parentb09c15921d692ed0e14365c25701acafcf20bf75 (diff)
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Moved mboard rev detection to iface.cpp.
This fixes the incorrect FPGA compat number readback bug. We were trying to read before the register set had been loaded.
Diffstat (limited to 'host')
-rw-r--r--host/lib/usrp/usrp2/mboard_impl.cpp4
-rw-r--r--host/lib/usrp/usrp2/usrp2_iface.cpp9
2 files changed, 7 insertions, 6 deletions
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index 3a7048cdd..805fd23db 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -48,10 +48,6 @@ usrp2_mboard_impl::usrp2_mboard_impl(
{
//make a new interface for usrp2 stuff
_iface = usrp2_iface::make(ctrl_transport);
-
- //extract the mboard rev numbers
- byte_vector_t rev_bytes = _iface->read_eeprom(USRP2_I2C_ADDR_MBOARD, USRP2_EE_MBOARD_REV, 2);
- _iface->set_hw_rev(mboard_rev_t::from_uint16(rev_bytes.at(0) | (rev_bytes.at(1) << 8)));
//contruct the interfaces to mboard perifs
_clock_ctrl = usrp2_clock_ctrl::make(_iface);
diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp
index bce859629..a5b39ceed 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.cpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.cpp
@@ -19,6 +19,7 @@
#include "usrp2_iface.hpp"
#include <uhd/utils/assert.hpp>
#include <uhd/types/dict.hpp>
+#include <uhd/usrp/mboard_rev.hpp>
#include <boost/thread.hpp>
#include <boost/foreach.hpp>
#include <boost/asio.hpp> //used for htonl and ntohl
@@ -50,7 +51,11 @@ public:
**********************************************************************/
usrp2_iface_impl(udp_simple::sptr ctrl_transport){
_ctrl_transport = ctrl_transport;
-/*
+
+ //extract the mboard rev numbers
+ byte_vector_t rev_bytes = read_eeprom(USRP2_I2C_ADDR_MBOARD, USRP2_EE_MBOARD_REV, 2);
+ set_hw_rev(uhd::usrp::mboard_rev_t::from_uint16(rev_bytes.at(0) | (rev_bytes.at(1) << 8)));
+
//check the fpga compatibility number
const boost::uint32_t fpga_compat_num = this->peek32(this->regs.compat_num_rb);
if (fpga_compat_num != USRP2_FPGA_COMPAT_NUM){
@@ -59,7 +64,7 @@ public:
"The fpga build is not compatible with the host code build."
) % int(USRP2_FPGA_COMPAT_NUM) % fpga_compat_num));
}
-*/
+
}
~usrp2_iface_impl(void){