diff options
author | Nick Foster <nick@nerdnetworks.org> | 2010-11-22 18:26:54 -0800 |
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committer | Nick Foster <nick@nerdnetworks.org> | 2010-11-22 18:26:54 -0800 |
commit | 13ae4786e091d5581baf31c9967dca822ef15e39 (patch) | |
tree | b649ffb942979f1efb6aef77d8d291bc9142e5cd /host | |
parent | 27e128ea70249bf4a79c6957fab14a3c4cad75f8 (diff) | |
download | uhd-13ae4786e091d5581baf31c9967dca822ef15e39.tar.gz uhd-13ae4786e091d5581baf31c9967dca822ef15e39.tar.bz2 uhd-13ae4786e091d5581baf31c9967dca822ef15e39.zip |
E100: clock sync implemented.
Diffstat (limited to 'host')
-rw-r--r-- | host/lib/usrp/usrp_e100/clock_ctrl.cpp | 26 | ||||
-rw-r--r-- | host/lib/usrp/usrp_e100/clock_ctrl.hpp | 15 | ||||
-rw-r--r-- | host/lib/usrp/usrp_e100/mboard_impl.cpp | 30 | ||||
-rw-r--r-- | host/lib/usrp/usrp_e100/usrp_e100_impl.hpp | 5 |
4 files changed, 74 insertions, 2 deletions
diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.cpp b/host/lib/usrp/usrp_e100/clock_ctrl.cpp index e99560540..1fb1a7125 100644 --- a/host/lib/usrp/usrp_e100/clock_ctrl.cpp +++ b/host/lib/usrp/usrp_e100/clock_ctrl.cpp @@ -208,6 +208,32 @@ public: this->send_reg(0x197); this->latch_regs(); } + + /*********************************************************************** + * Clock reference control + **********************************************************************/ + void use_internal_ref(void) { + _ad9522_regs.enable_ref2 = 1; + _ad9522_regs.enable_ref1 = 0; + _ad9522_regs.select_ref = ad9522_regs_t::SELECT_REF_REF2; + _ad9522_regs.enb_auto_ref_switchover = ad9522_regs_t::ENB_AUTO_REF_SWITCHOVER_MANUAL; + this->send_reg(0x01C); + } + + void use_external_ref(void) { + _ad9522_regs.enable_ref2 = 0; + _ad9522_regs.enable_ref1 = 1; + _ad9522_regs.select_ref = ad9522_regs_t::SELECT_REF_REF1; + _ad9522_regs.enb_auto_ref_switchover = ad9522_regs_t::ENB_AUTO_REF_SWITCHOVER_MANUAL; + this->send_reg(0x01C); + } + + void use_auto_ref(void) { + _ad9522_regs.enable_ref2 = 1; + _ad9522_regs.enable_ref1 = 1; + _ad9522_regs.select_ref = ad9522_regs_t::SELECT_REF_REF1; + _ad9522_regs.enb_auto_ref_switchover = ad9522_regs_t::ENB_AUTO_REF_SWITCHOVER_AUTO; + } private: usrp_e100_iface::sptr _iface; diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.hpp b/host/lib/usrp/usrp_e100/clock_ctrl.hpp index 0ae68728e..d613d1473 100644 --- a/host/lib/usrp/usrp_e100/clock_ctrl.hpp +++ b/host/lib/usrp/usrp_e100/clock_ctrl.hpp @@ -82,6 +82,21 @@ public: * \param enb true to enable */ virtual void enable_tx_dboard_clock(bool enb) = 0; + + /*! + * Use the internal TCXO reference + */ + virtual void use_internal_ref(void) = 0; + + /*! + * Use the external SMA reference + */ + virtual void use_external_ref(void) = 0; + + /*! + * Use external if available, internal otherwise + */ + virtual void use_auto_ref(void) = 0; }; diff --git a/host/lib/usrp/usrp_e100/mboard_impl.cpp b/host/lib/usrp/usrp_e100/mboard_impl.cpp index 9c6317b94..03c4385aa 100644 --- a/host/lib/usrp/usrp_e100/mboard_impl.cpp +++ b/host/lib/usrp/usrp_e100/mboard_impl.cpp @@ -39,8 +39,31 @@ void usrp_e100_impl::mboard_init(void){ //init the clock config _clock_config.ref_source = clock_config_t::REF_AUTO; _clock_config.pps_source = clock_config_t::PPS_SMA; + _clock_config.pps_polarity = clock_config_t::PPS_NEG; - //TODO poke the clock config regs + update_clock_config(); +} + +void usrp_e100_impl::update_clock_config(void){ + boost::uint32_t pps_flags = 0; + + //translate pps polarity enums + switch(_clock_config.pps_polarity){ + case clock_config_t::PPS_POS: pps_flags |= UE_FLAG_TIME64_PPS_POSEDGE; break; + case clock_config_t::PPS_NEG: pps_flags |= UE_FLAG_TIME64_PPS_NEGEDGE; break; + default: throw std::runtime_error("unhandled clock configuration pps polarity"); + } + + //set the pps flags + _iface->poke32(UE_REG_TIME64_FLAGS, pps_flags); + + //clock source ref 10mhz + switch(_clock_config.ref_source){ + case clock_config_t::REF_AUTO: _clock_ctrl->use_auto_ref(); + case clock_config_t::REF_INT: _clock_ctrl->use_internal_ref(); + case clock_config_t::REF_SMA: _clock_ctrl->use_external_ref(); + default: throw std::runtime_error("unhandled clock configuration ref source"); + } } /*********************************************************************** @@ -164,6 +187,11 @@ void usrp_e100_impl::mboard_set(const wax::obj &key, const wax::obj &val){ val.as<mboard_eeprom_t>().commit(_iface->get_i2c_dev_iface(), mboard_eeprom_t::MAP_E100); _iface->mb_eeprom = mboard_eeprom_t(_iface->get_i2c_dev_iface(), mboard_eeprom_t::MAP_E100); return; + + case MBOARD_PROP_CLOCK_CONFIG: + _clock_config = val.as<clock_config_t>(); + update_clock_config(); + return; default: UHD_THROW_PROP_SET_ERROR(); } diff --git a/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp b/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp index fe60ac0be..de158ea5e 100644 --- a/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp +++ b/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp @@ -102,7 +102,6 @@ private: //configuration shadows uhd::clock_config_t _clock_config; - //TODO otw type recv/send //ad9522 clock control usrp_e100_clock_ctrl::sptr _clock_ctrl; @@ -159,6 +158,10 @@ private: void tx_codec_get(const wax::obj &, wax::obj &); void tx_codec_set(const wax::obj &, const wax::obj &); wax_obj_proxy::sptr _rx_codec_proxy, _tx_codec_proxy; + + //clock control functions and settings + void init_clock_config(void); + void update_clock_config(void); }; #endif /* INCLUDED_USRP_E100_IMPL_HPP */ |