diff options
author | Jason Abele <jason@ettus.com> | 2010-11-23 17:05:14 -0800 |
---|---|---|
committer | Jason Abele <jason@ettus.com> | 2010-11-23 17:05:14 -0800 |
commit | b8b4d9406c9785546c575addff2a5ba518ecd790 (patch) | |
tree | 38fca8642d000a9565096b96676509eda9a60873 /host | |
parent | 0c147c98dcfae13e802db9bbfb0fb6226ae9f115 (diff) | |
download | uhd-b8b4d9406c9785546c575addff2a5ba518ecd790.tar.gz uhd-b8b4d9406c9785546c575addff2a5ba518ecd790.tar.bz2 uhd-b8b4d9406c9785546c575addff2a5ba518ecd790.zip |
Updated refclock docs for USRP1, USRP2 and N2XX
Added power range limits
Added external refclock notes for USRP1
Diffstat (limited to 'host')
-rw-r--r-- | host/docs/usrp1.rst | 22 | ||||
-rw-r--r-- | host/docs/usrp_nxxx.rst | 18 |
2 files changed, 35 insertions, 5 deletions
diff --git a/host/docs/usrp1.rst b/host/docs/usrp1.rst index be684e20e..9038616a8 100644 --- a/host/docs/usrp1.rst +++ b/host/docs/usrp1.rst @@ -89,3 +89,25 @@ Windows - install driver On Windows, a driver must be installed the first time the USRP1 is attached to the host computer. A download link for this driver can be found on the UHD wiki page. Download and unpack the driver, and direct the Windows driver install wizard to the .inf file. + +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +Hardware setup notes +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +------------------------------------------------------------------------ +External Clock Modification +------------------------------------------------------------------------ +The USRP can be modified to accept an external clock reference instead of the 64MHz onboard reference. + * Solder SMA (LTI-SASF54GT) connector to J2001 + * Move 0 ohm 0603 resistor R2029 to R2930 + * Move 0.01uF 0603 capacitor C929 to C926 + * Remove 0.01uF 0603 capacitor C924 + +The new external clock needs to be a square wave between +7dBm and +15dBm + +To configure UHD for the new reference clock, modify host/lib/usrp/usrp1/clock_ctrl.cpp: + +:: + + static const double master_clock_rate = <YOUR_NEW_REFERENCE_FREQUENCY>; + diff --git a/host/docs/usrp_nxxx.rst b/host/docs/usrp_nxxx.rst index 617555b56..df8c6fcb0 100644 --- a/host/docs/usrp_nxxx.rst +++ b/host/docs/usrp_nxxx.rst @@ -228,19 +228,27 @@ The LEDs reveal the following about the state of the device: ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Ref Clock - 10MHz ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -Using an external 10MHz reference clock requires a signal level between -+5dBm and +20dBm at 10MHz applied to the Ref Clock SMA port on the front panel. +Using an external 10MHz reference clock, square wave will offer the best phase +noise performance, but sinusoid is acceptable. The reference clock requires the following power level: + +* **USRP2** 5 to 15dBm +* **N2XX** 0 to 15dBm ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ PPS - Pulse Per Second ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -Using a PPS signal for timestamp synchronization requires a 5Vpp square wave signal +Using a PPS signal for timestamp synchronization requires a square wave signal with the following amplitude: + +* **USRP2** 5Vpp +* **N2XX** 3.3 to 5Vpp + +Test the PPS input with the following app: + +* <args> are device address arguments (optional if only one USRP is on your machine) -Test the PPS input of the USRP2 with the following app: :: cd <prefix>/share/uhd/examples ./test_pps_input --args=<args> -* <args> are device address arguments (optional if only one USRP is on your machine) |