python: Change default name for rfnoc_image_core

This changes the default name of the image core file to
<DEVICE>_rfnoc_image_core.v instead of naming it after the YAML file.
This ensures that when you use a custom YAML file, the resulting
FPGA build will use the generated rfnoc_image_core and static_router
files, rather than just the generated static_router file.

2 files changed, 16 insertions, 9 deletions

diff --git a/host/python/uhd/imgbuilder/image_builder.py b/host/python/uhd/imgbuilder/image_builder.py
index 9c26f2726..2521ee31c 100755
--- a/host/python/uhd/imgbuilder/image_builder.py
+++ b/host/python/uhd/imgbuilder/image_builder.py
@@ -795,21 +795,26 @@ def get_core_config_path(config_path):
     """
     return os.path.join(config_path, RFNOC_CORE_DIR)
 
-def generate_image_core_path(output_path, source):
+def generate_image_core_path(output_path, device, source):
     """
     Creates the path where the image core file gets to be stored.
 
     output_path: If not None, this is returned
-    source: Otherwise, this path is returned with a .v argument
+    device: Device type string, used to generate default file name
+    source: Otherwise, this path is returned, combined with a default file name
     """
     if output_path is not None:
         return output_path
-    source = os.path.splitext(os.path.abspath(os.path.normpath(source)))[0]
-    return source + '.v'
+    source = os.path.split(os.path.abspath(os.path.normpath(source)))[0]
+    return os.path.join(source, "{}_rfnoc_image_core.v".format(device))
 
 def generate_edge_file_path(output_path, device, source):
     """
     Creates a valid path for the edge file to get stored.
+
+    output_path: If not None, this is returned
+    device: Device type string, used to generate default file name
+    source: Otherwise, this path is returned, combined with a default file name
     """
     if output_path is not None:
         return output_path
@@ -836,7 +841,8 @@ def build_image(config, fpga_path, config_path, device, **args):
     """
     logging.info("Selected device %s", device)
     image_core_path = \
-        generate_image_core_path(args.get('output_path'), args.get('source'))
+        generate_image_core_path(
+            args.get('output_path'), device, args.get('source'))
     edge_file = \
         generate_edge_file_path(
             args.get('router_hex_path'), device, args.get('source'))
diff --git a/host/utils/rfnoc_image_builder.py b/host/utils/rfnoc_image_builder.py
index d0c5ae659..9d52fb889 100755
--- a/host/utils/rfnoc_image_builder.py
+++ b/host/utils/rfnoc_image_builder.py
@@ -39,10 +39,10 @@ def setup_parser():
 
     config_group = parser.add_mutually_exclusive_group(required=True)
     config_group.add_argument(
-        "-y", "--yaml_config",
+        "-y", "--yaml-config",
         help="Path to yml configuration file")
     config_group.add_argument(
-        "-r", "--grc_config",
+        "-r", "--grc-config",
         help="Path to grc file to generate config from")
     parser.add_argument(
         "-F", "--fpga-dir",
@@ -53,11 +53,12 @@ def setup_parser():
     parser.add_argument(
         "-o", "--image-core-output",
         help="Path to where to save the image core Verilog source. "
-             "Defaults to the location of the YAML file.")
+             "Defaults to the directory of the YAML file, filename <DEVICE>_rfnoc_image_core.v",
+        default=None)
     parser.add_argument(
         "-x", "--router-hex-output",
         help="Path to where to save the static router hex file. "
-             "Defaults to the location of the YAML file, filename $device_static_router.hex",
+             "Defaults to the directory of the YAML file, filename <DEVICE>_static_router.hex",
         default=None)
     parser.add_argument(
         "-I", "--include-dir",