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authorWade Fife <wade.fife@ettus.com>2020-05-07 14:43:32 -0500
committerAaron Rossetto <aaron.rossetto@ni.com>2020-05-19 14:22:55 -0500
commita40f2a4a5d04aad3ef3e222033fbacc521233782 (patch)
tree98137f9d7e2b8a00f20b6c2dd9366185ec9bf2d1 /host
parenteb4bedf3133ce1ed275d03b36839ec61d75f2e60 (diff)
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fpga: rfnoc: Add Vector IIR RFNoC block
Diffstat (limited to 'host')
-rw-r--r--host/include/uhd/rfnoc/blocks/vector_iir.yml58
1 files changed, 58 insertions, 0 deletions
diff --git a/host/include/uhd/rfnoc/blocks/vector_iir.yml b/host/include/uhd/rfnoc/blocks/vector_iir.yml
new file mode 100644
index 000000000..e04c832d6
--- /dev/null
+++ b/host/include/uhd/rfnoc/blocks/vector_iir.yml
@@ -0,0 +1,58 @@
+schema: rfnoc_modtool_args
+module_name: vector_iir
+version: 1.0
+rfnoc_version: 1.0
+chdr_width: 64
+noc_id: 0x11120000
+
+parameters:
+ NUM_PORTS: 1
+ # MAX_DELAY should correspond to the maximum SPP. Optimal values are a power
+ # of two, minus one (e.g, 2047). Here we multiply the CHDR MTU by the number
+ # of samples per CHDR word to get the maximum SPP.
+ MAX_DELAY: (2**MTU*CHDR_W/32-1)
+
+clocks:
+ - name: rfnoc_chdr
+ freq: "[]"
+ - name: rfnoc_ctrl
+ freq: "[]"
+ - name: ce
+ freq: "[]"
+
+control:
+ sw_iface: nocscript
+ fpga_iface: ctrlport
+ interface_direction: slave
+ fifo_depth: 32
+ clk_domain: ce
+ ctrlport:
+ byte_mode: False
+ timed: False
+ has_status: False
+
+data:
+ fpga_iface: axis_pyld_ctxt
+ clk_domain: ce
+ inputs:
+ in:
+ num_ports: NUM_PORTS
+ item_width: 32
+ nipc: 1
+ context_fifo_depth: 2
+ payload_fifo_depth: 32
+ format: int32
+ mdata_sig: ~
+ outputs:
+ out:
+ num_ports: NUM_PORTS
+ item_width: 32
+ nipc: 1
+ context_fifo_depth: 2
+ payload_fifo_depth: 32
+ format: int32
+ mdata_sig: ~
+
+registers:
+
+properties: