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author | Wade Fife <wade.fife@ettus.com> | 2019-11-08 10:32:48 -0600 |
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committer | Martin Braun <martin.braun@ettus.com> | 2019-11-26 12:21:33 -0800 |
commit | 72e833e7bb71b2b2891ef5b07ada5aaf856a266a (patch) | |
tree | ff8b502320e779c11f747764602d59053d70bb62 /host | |
parent | 8ae60e342b8b634c8fd9ae56f801fd21b6d123ca (diff) | |
download | uhd-72e833e7bb71b2b2891ef5b07ada5aaf856a266a.tar.gz uhd-72e833e7bb71b2b2891ef5b07ada5aaf856a266a.tar.bz2 uhd-72e833e7bb71b2b2891ef5b07ada5aaf856a266a.zip |
rfnoc: Replace DDC/DUC YAML variants with single version
Diffstat (limited to 'host')
-rw-r--r-- | host/include/uhd/rfnoc/blocks/ddc.yml (renamed from host/include/uhd/rfnoc/blocks/ddc_1x64.yml) | 8 | ||||
-rw-r--r-- | host/include/uhd/rfnoc/blocks/ddc_2x64.yml | 68 | ||||
-rw-r--r-- | host/include/uhd/rfnoc/blocks/duc.yml (renamed from host/include/uhd/rfnoc/blocks/duc_1x64.yml) | 10 | ||||
-rw-r--r-- | host/include/uhd/rfnoc/blocks/duc_2x64.yml | 68 |
4 files changed, 10 insertions, 144 deletions
diff --git a/host/include/uhd/rfnoc/blocks/ddc_1x64.yml b/host/include/uhd/rfnoc/blocks/ddc.yml index bfdbca04f..86b2ebe89 100644 --- a/host/include/uhd/rfnoc/blocks/ddc_1x64.yml +++ b/host/include/uhd/rfnoc/blocks/ddc.yml @@ -33,20 +33,20 @@ data: fpga_iface: axis_data clk_domain: ce inputs: - in_0: + in: num_ports: NUM_PORTS item_width: 32 nipc: 1 - info_fifo_depth: 5 + info_fifo_depth: 32 payload_fifo_depth: MTU format: int32 mdata_sig: ~ outputs: - out_0: + out: num_ports: NUM_PORTS item_width: 32 nipc: 1 - info_fifo_depth: 5 + info_fifo_depth: 32 payload_fifo_depth: MTU format: int32 mdata_sig: ~ diff --git a/host/include/uhd/rfnoc/blocks/ddc_2x64.yml b/host/include/uhd/rfnoc/blocks/ddc_2x64.yml deleted file mode 100644 index 2aa864b3a..000000000 --- a/host/include/uhd/rfnoc/blocks/ddc_2x64.yml +++ /dev/null @@ -1,68 +0,0 @@ -schema: rfnoc_modtool_args -module_name: ddc -version: 1.0 -rfnoc_version: 1.0 -chdr_width: 64 -noc_id: 0xDDC00000 - -parameters: - NUM_PORTS: 2 - NUM_HB: 3 - CIC_MAX_DECIM: 255 - -clocks: - - name: rfnoc_chdr - freq: "[]" - - name: rfnoc_ctrl - freq: "[]" - - name: ce - freq: "[]" - -control: - sw_iface: nocscript - fpga_iface: ctrlport - interface_direction: slave - fifo_depth: 32 - clk_domain: ce - ctrlport: - byte_mode: False - timed: False - has_status: False - -data: - fpga_iface: axis_data - clk_domain: ce - inputs: - in_0: - item_width: 32 - nipc: 1 - info_fifo_depth: 5 - payload_fifo_depth: MTU - format: int32 - mdata_sig: ~ - in_1: - item_width: 32 - nipc: 1 - info_fifo_depth: 5 - payload_fifo_depth: MTU - format: int32 - mdata_sig: ~ - outputs: - out_0: - item_width: 32 - nipc: 1 - info_fifo_depth: 5 - payload_fifo_depth: MTU - format: int32 - mdata_sig: ~ - out_1: - item_width: 32 - nipc: 1 - info_fifo_depth: 5 - payload_fifo_depth: MTU - format: int32 - mdata_sig: ~ - -registers: - -properties: diff --git a/host/include/uhd/rfnoc/blocks/duc_1x64.yml b/host/include/uhd/rfnoc/blocks/duc.yml index adcdf1554..e5cd712ea 100644 --- a/host/include/uhd/rfnoc/blocks/duc_1x64.yml +++ b/host/include/uhd/rfnoc/blocks/duc.yml @@ -33,18 +33,20 @@ data: fpga_iface: axis_data clk_domain: ce inputs: - in_0: + in: + num_ports: NUM_PORTS item_width: 32 nipc: 1 - info_fifo_depth: 5 + info_fifo_depth: 32 payload_fifo_depth: MTU format: int32 mdata_sig: ~ outputs: - out_0: + out: + num_ports: NUM_PORTS item_width: 32 nipc: 1 - info_fifo_depth: 5 + info_fifo_depth: 32 payload_fifo_depth: MTU format: int32 mdata_sig: ~ diff --git a/host/include/uhd/rfnoc/blocks/duc_2x64.yml b/host/include/uhd/rfnoc/blocks/duc_2x64.yml deleted file mode 100644 index 7fb88dd22..000000000 --- a/host/include/uhd/rfnoc/blocks/duc_2x64.yml +++ /dev/null @@ -1,68 +0,0 @@ -schema: rfnoc_modtool_args -module_name: duc -version: 1.0 -rfnoc_version: 1.0 -chdr_width: 64 -noc_id: 0xD0C00000 - -parameters: - NUM_PORTS: 2 - NUM_HB: 3 - CIC_MAX_INTERP: 255 - -clocks: - - name: rfnoc_chdr - freq: "[]" - - name: rfnoc_ctrl - freq: "[]" - - name: ce - freq: "[]" - -control: - sw_iface: nocscript - fpga_iface: ctrlport - interface_direction: slave - fifo_depth: 32 - clk_domain: ce - ctrlport: - byte_mode: False - timed: False - has_status: False - -data: - fpga_iface: axis_data - clk_domain: ce - inputs: - in_0: - item_width: 32 - nipc: 1 - info_fifo_depth: 5 - payload_fifo_depth: MTU - format: int32 - mdata_sig: ~ - in_1: - item_width: 32 - nipc: 1 - info_fifo_depth: 5 - payload_fifo_depth: MTU - format: int32 - mdata_sig: ~ - outputs: - out_0: - item_width: 32 - nipc: 1 - info_fifo_depth: 5 - payload_fifo_depth: MTU - format: int32 - mdata_sig: ~ - out_1: - item_width: 32 - nipc: 1 - info_fifo_depth: 5 - payload_fifo_depth: MTU - format: int32 - mdata_sig: ~ - -registers: - -properties: |