siggen: Fix direction of rotation

The I and Q were swapped in sine_tone, which caused confusion and made
the rotation of REG_CARTESIAN clockwise by default. This effectively
made the resulting frequency negative. This PR makes the I and Q order
consistent with RFNoC and fixes the direction of rotation so that a
positive value for REG_PHASE_INC (phase increment) results in a
counter-clockwise rotation, which yields a positive frequency.

1 files changed, 9 insertions, 9 deletions

diff --git a/host/lib/rfnoc/siggen_block_control.cpp b/host/lib/rfnoc/siggen_block_control.cpp
index 7fbe79337..2628d66ab 100644
--- a/host/lib/rfnoc/siggen_block_control.cpp
+++ b/host/lib/rfnoc/siggen_block_control.cpp
@@ -307,16 +307,16 @@ private:
         // The rotator that rotates the phasor to generate the sinusoidal
         // data has an initial phase offset which is impossible to predict.
         // Thus, the Cartesian parameter is largely immaterial, as long as
-        // the phasor's amplitude matchines with the client has specified.
+        // the phasor's amplitude matches what the client has specified.
         // For simplicity, the Cartesian parameter is chosen to have a real
-        // (X) component of 0.0 and an imaginary (Y) component of the desired
-        // amplitude.
-        const int16_t cartesian_i_fp = clamp<int16_t>(amplitude * 32767.0);
-
-        // Bits 31:16 represent the imaginary component (the pre-scaled
-        // fixed point amplitude), while bits 15:0 represents the real
-        // component (which are zeroed).
-        const uint32_t cartesian_reg_value = (uint32_t(cartesian_i_fp) << 16);
+        // (X) component of the desired amplitude and an imaginary (Y)
+        // component of 0.0.
+        const int16_t cartesian_x_fp = clamp<int16_t>(amplitude * 32767.0);
+
+        // Bits 31:16 represent the real component (the pre-scaled fixed-point
+        // amplitude), while bits 15:0 represent the imaginary component (which
+        // is zeroed).
+        const uint32_t cartesian_reg_value = (uint32_t(cartesian_x_fp) << 16);
         _siggen_reg_iface.poke32(REG_CARTESIAN_OFFSET, cartesian_reg_value, port);
     }