python: Clean up image builder generated code

This updates the RFNoC image to generate code that's a bit more tidy,
with consistent spacing and better alignment.

9 files changed, 142 insertions, 117 deletions

diff --git a/host/python/uhd/imgbuilder/templates/modules/chdr_xb_sep_transport.v.mako b/host/python/uhd/imgbuilder/templates/modules/chdr_xb_sep_transport.v.mako
index 0862a1ac1..31bc781a5 100644
--- a/host/python/uhd/imgbuilder/templates/modules/chdr_xb_sep_transport.v.mako
+++ b/host/python/uhd/imgbuilder/templates/modules/chdr_xb_sep_transport.v.mako
@@ -13,11 +13,11 @@
   sep2xb = sep2xb[:-2]
   xb2sep = xb2sep[:-2]
 %>\
-    .s_axis_tdata   ({${re.sub("wire", "tdata", sep2xb)}}),
-    .s_axis_tlast   ({${re.sub("wire", "tlast", sep2xb)}}),
+    .s_axis_tdata   ({${re.sub("wire", "tdata ", sep2xb)}}),
+    .s_axis_tlast   ({${re.sub("wire", "tlast ", sep2xb)}}),
     .s_axis_tvalid  ({${re.sub("wire", "tvalid", sep2xb)}}),
     .s_axis_tready  ({${re.sub("wire", "tready", sep2xb)}}),
-    .m_axis_tdata   ({${re.sub("wire", "tdata", xb2sep)}}),
-    .m_axis_tlast   ({${re.sub("wire", "tlast", xb2sep)}}),
+    .m_axis_tdata   ({${re.sub("wire", "tdata ", xb2sep)}}),
+    .m_axis_tlast   ({${re.sub("wire", "tlast ", xb2sep)}}),
     .m_axis_tvalid  ({${re.sub("wire", "tvalid", xb2sep)}}),
     .m_axis_tready  ({${re.sub("wire", "tready", xb2sep)}}),
diff --git a/host/python/uhd/imgbuilder/templates/modules/connect_clk_domains.v.mako b/host/python/uhd/imgbuilder/templates/modules/connect_clk_domains.v.mako
index df055645c..cc940cb32 100644
--- a/host/python/uhd/imgbuilder/templates/modules/connect_clk_domains.v.mako
+++ b/host/python/uhd/imgbuilder/templates/modules/connect_clk_domains.v.mako
@@ -9,4 +9,3 @@
 %>\
   assign ${dst_name}_${dst["name"]}_clk = ${src["name"]}_clk;
 %endfor
-
diff --git a/host/python/uhd/imgbuilder/templates/modules/ctrl_crossbar.v.mako b/host/python/uhd/imgbuilder/templates/modules/ctrl_crossbar.v.mako
index 5872e270e..3f41cad88 100644
--- a/host/python/uhd/imgbuilder/templates/modules/ctrl_crossbar.v.mako
+++ b/host/python/uhd/imgbuilder/templates/modules/ctrl_crossbar.v.mako
@@ -10,10 +10,10 @@
   axisstr += "{0}_core_ctrl_{1}"
 %>\
 %for block in blocks:
-  wire [31:0]       m_${block}_ctrl_tdata ,   s_${block}_ctrl_tdata ;
-  wire              m_${block}_ctrl_tlast ,   s_${block}_ctrl_tlast ;
-  wire              m_${block}_ctrl_tvalid,   s_${block}_ctrl_tvalid;
-  wire              m_${block}_ctrl_tready,   s_${block}_ctrl_tready;
+  wire [31:0] m_${block}_ctrl_tdata,  s_${block}_ctrl_tdata;
+  wire        m_${block}_ctrl_tlast,  s_${block}_ctrl_tlast;
+  wire        m_${block}_ctrl_tvalid, s_${block}_ctrl_tvalid;
+  wire        m_${block}_ctrl_tready, s_${block}_ctrl_tready;
 %endfor
 
   axis_ctrl_crossbar_nxn #(
diff --git a/host/python/uhd/imgbuilder/templates/modules/device_io_ports.v.mako b/host/python/uhd/imgbuilder/templates/modules/device_io_ports.v.mako
index d0f90c3e4..9a2c7274d 100644
--- a/host/python/uhd/imgbuilder/templates/modules/device_io_ports.v.mako
+++ b/host/python/uhd/imgbuilder/templates/modules/device_io_ports.v.mako
@@ -1,8 +1,9 @@
 <%page args="io_ports"/>\
-//// IO ports //////////////////////////////////
+  // IO ports /////////////////////////
+
 %for name, io_port in io_ports.items():
-//  ${name}
+  // ${name}
   %for wire in io_port["wires"]:
-  ${wire["direction"]} wire [${"%3d" % wire["width"]}-1:0] ${wire["name"]},
+  ${wire["direction"]} wire [${"%4d" % (wire["width"]-1)}:0] ${wire["name"]},
   %endfor
 %endfor
diff --git a/host/python/uhd/imgbuilder/templates/modules/device_transport.v.mako b/host/python/uhd/imgbuilder/templates/modules/device_transport.v.mako
index 3d752ce13..252917189 100644
--- a/host/python/uhd/imgbuilder/templates/modules/device_transport.v.mako
+++ b/host/python/uhd/imgbuilder/templates/modules/device_transport.v.mako
@@ -1,13 +1,14 @@
-<%page args="transports"/>\
-\
+<%page args="transports"/>
+  // Transport Adapters ///////////////
+
 %for i, transport in enumerate(transports):
-  // Transport ${i} (${transport["name"]} ${transport["type"]})
-  input  wire [${transport["width"]}-1:0]  s_${transport["name"]}_tdata,
-  input  wire         s_${transport["name"]}_tlast,
-  input  wire         s_${transport["name"]}_tvalid,
-  output wire         s_${transport["name"]}_tready,
-  output wire [${transport["width"]}-1:0]  m_${transport["name"]}_tdata,
-  output wire         m_${transport["name"]}_tlast,
-  output wire         m_${transport["name"]}_tvalid,
-  input  wire         m_${transport["name"]}_tready${"," if i < len(transports) - 1 else ""}
+  // Transport ${i} (${transport["name"]})
+  input  wire [${"%4d" % (transport["width"]-1)}:0] s_${transport["name"]}_tdata,
+  input  wire          s_${transport["name"]}_tlast,
+  input  wire          s_${transport["name"]}_tvalid,
+  output wire          s_${transport["name"]}_tready,
+  output wire [${"%4d" % (transport["width"]-1)}:0] m_${transport["name"]}_tdata,
+  output wire          m_${transport["name"]}_tlast,
+  output wire          m_${transport["name"]}_tvalid,
+  input  wire          m_${transport["name"]}_tready${"," if i < len(transports) - 1 else ""}
 %endfor
diff --git a/host/python/uhd/imgbuilder/templates/modules/rfnoc_block.v.mako b/host/python/uhd/imgbuilder/templates/modules/rfnoc_block.v.mako
index 064118db7..48f59a4bc 100644
--- a/host/python/uhd/imgbuilder/templates/modules/rfnoc_block.v.mako
+++ b/host/python/uhd/imgbuilder/templates/modules/rfnoc_block.v.mako
@@ -19,9 +19,10 @@
   axis_outputs = axis_outputs[:-2]
 %>\
 
-  // ----------------------------------------------------
+  //-----------------------------------
   // ${block_name}
-  // ----------------------------------------------------
+  //-----------------------------------
+
 %for clock in block.clocks:
   %if not clock["name"] in ["rfnoc_chdr", "rfnoc_ctrl"]:
   wire              ${block_name}_${clock["name"]}_clk;
@@ -38,53 +39,51 @@
 
 %if hasattr(block, "io_ports"):
   %for name, io_port in block.io_ports.items():
-  //  ${name}
+  // ${name}
     %for wire in io_port["wires"]:
-  wire [${"%3d" % wire["width"]}-1:0] ${block_name}_${wire["name"]};
+  wire [${"%4d" % (wire["width"]-1)}:0] ${block_name}_${wire["name"]};
     %endfor
   %endfor
-%endif
 
+%endif
   rfnoc_block_${block.module_name} #(
-    .THIS_PORTID(${block_id}),
-    .CHDR_W(CHDR_W),
+    .THIS_PORTID         (${block_id}),
+    .CHDR_W              (CHDR_W),
 %for name, value in block_params.items():
-    .${name}(${value}),
+    .${"%-20s" % name}(${value}),
 %endfor
-    .MTU(MTU)
+    .MTU                 (MTU)
   ) b_${block_name}_${block_number} (
-    .rfnoc_chdr_clk     (rfnoc_chdr_clk),
-    .rfnoc_ctrl_clk     (rfnoc_ctrl_clk),
+    .rfnoc_chdr_clk      (rfnoc_chdr_clk),
+    .rfnoc_ctrl_clk      (rfnoc_ctrl_clk),
 %for clock in block.clocks:
   %if not clock["name"] in ["rfnoc_chdr", "rfnoc_ctrl"]:
-    .${clock["name"]}_clk(${block_name}_${clock["name"]}_clk),
+    .${"%-20s" % (clock["name"] + "_clk")}(${block_name}_${clock["name"]}_clk),
   %endif
 %endfor
-    .rfnoc_core_config  (rfnoc_core_config[512*${block_number + 1}-1:512*${block_number}]),
-    .rfnoc_core_status  (rfnoc_core_status[512*${block_number + 1}-1:512*${block_number}]),
-
+    .rfnoc_core_config   (rfnoc_core_config[512*${block_number + 1}-1:512*${block_number}]),
+    .rfnoc_core_status   (rfnoc_core_status[512*${block_number + 1}-1:512*${block_number}]),
 %if hasattr(block, "io_ports"):
   %for name, io_port in block.io_ports.items():
     %for wire in io_port["wires"]:
-    .${wire["name"]}(${block_name}_${wire["name"]}),
+    .${"%-20s" % wire["name"]}(${block_name}_${wire["name"]}),
     %endfor
   %endfor
 %endif
-
-    .s_rfnoc_chdr_tdata ({${axis_inputs.format("s", "tdata ")}}),
-    .s_rfnoc_chdr_tlast ({${axis_inputs.format("s", "tlast ")}}),
-    .s_rfnoc_chdr_tvalid({${axis_inputs.format("s", "tvalid")}}),
-    .s_rfnoc_chdr_tready({${axis_inputs.format("s", "tready")}}),
-    .m_rfnoc_chdr_tdata ({${axis_outputs.format("m", "tdata ")}}),
-    .m_rfnoc_chdr_tlast ({${axis_outputs.format("m", "tlast ")}}),
-    .m_rfnoc_chdr_tvalid({${axis_outputs.format("m", "tvalid")}}),
-    .m_rfnoc_chdr_tready({${axis_outputs.format("m", "tready")}}),
-    .s_rfnoc_ctrl_tdata (s_${block_name}_ctrl_tdata ),
-    .s_rfnoc_ctrl_tlast (s_${block_name}_ctrl_tlast ),
-    .s_rfnoc_ctrl_tvalid(s_${block_name}_ctrl_tvalid),
-    .s_rfnoc_ctrl_tready(s_${block_name}_ctrl_tready),
-    .m_rfnoc_ctrl_tdata (m_${block_name}_ctrl_tdata ),
-    .m_rfnoc_ctrl_tlast (m_${block_name}_ctrl_tlast ),
-    .m_rfnoc_ctrl_tvalid(m_${block_name}_ctrl_tvalid),
-    .m_rfnoc_ctrl_tready(m_${block_name}_ctrl_tready)
+    .s_rfnoc_chdr_tdata  ({${axis_inputs.format("s", "tdata ")}}),
+    .s_rfnoc_chdr_tlast  ({${axis_inputs.format("s", "tlast ")}}),
+    .s_rfnoc_chdr_tvalid ({${axis_inputs.format("s", "tvalid")}}),
+    .s_rfnoc_chdr_tready ({${axis_inputs.format("s", "tready")}}),
+    .m_rfnoc_chdr_tdata  ({${axis_outputs.format("m", "tdata ")}}),
+    .m_rfnoc_chdr_tlast  ({${axis_outputs.format("m", "tlast ")}}),
+    .m_rfnoc_chdr_tvalid ({${axis_outputs.format("m", "tvalid")}}),
+    .m_rfnoc_chdr_tready ({${axis_outputs.format("m", "tready")}}),
+    .s_rfnoc_ctrl_tdata  (s_${block_name}_ctrl_tdata),
+    .s_rfnoc_ctrl_tlast  (s_${block_name}_ctrl_tlast),
+    .s_rfnoc_ctrl_tvalid (s_${block_name}_ctrl_tvalid),
+    .s_rfnoc_ctrl_tready (s_${block_name}_ctrl_tready),
+    .m_rfnoc_ctrl_tdata  (m_${block_name}_ctrl_tdata),
+    .m_rfnoc_ctrl_tlast  (m_${block_name}_ctrl_tlast),
+    .m_rfnoc_ctrl_tvalid (m_${block_name}_ctrl_tvalid),
+    .m_rfnoc_ctrl_tready (m_${block_name}_ctrl_tready)
   );
diff --git a/host/python/uhd/imgbuilder/templates/modules/static_router.v.mako b/host/python/uhd/imgbuilder/templates/modules/static_router.v.mako
index 3649c278b..a505d5d2f 100644
--- a/host/python/uhd/imgbuilder/templates/modules/static_router.v.mako
+++ b/host/python/uhd/imgbuilder/templates/modules/static_router.v.mako
@@ -7,9 +7,9 @@
   srcport = "in" if connection["srcport"] == None else connection["srcport"]
   dstport = "out" if connection["dstport"] == None else connection["dstport"]
 %>\
-  assign s_${dstblk}_${dstport}_tdata = m_${srcblk}_${srcport}_tdata ;
-  assign s_${dstblk}_${dstport}_tlast = m_${srcblk}_${srcport}_tlast ;
+  assign s_${dstblk}_${dstport}_tdata = m_${srcblk}_${srcport}_tdata;
+  assign s_${dstblk}_${dstport}_tlast = m_${srcblk}_${srcport}_tlast;
   assign s_${dstblk}_${dstport}_tvalid = m_${srcblk}_${srcport}_tvalid;
   assign m_${srcblk}_${srcport}_tready = s_${dstblk}_${dstport}_tready;
 
-%endfor
\ No newline at end of file
+%endfor
diff --git a/host/python/uhd/imgbuilder/templates/modules/stream_endpoints.v.mako b/host/python/uhd/imgbuilder/templates/modules/stream_endpoints.v.mako
index 5cb88b6c1..b8c18fba9 100644
--- a/host/python/uhd/imgbuilder/templates/modules/stream_endpoints.v.mako
+++ b/host/python/uhd/imgbuilder/templates/modules/stream_endpoints.v.mako
@@ -35,8 +35,8 @@ else:
   wire              ${axis_inputs[sep].format(sep,"tlast")};
   wire              ${axis_inputs[sep].format(sep,"tvalid")};
   wire              ${axis_inputs[sep].format(sep,"tready")};
-  wire [31:0]       m_${sep}_ctrl_tdata , s_${sep}_ctrl_tdata ;
-  wire              m_${sep}_ctrl_tlast , s_${sep}_ctrl_tlast ;
+  wire [      31:0] m_${sep}_ctrl_tdata,  s_${sep}_ctrl_tdata;
+  wire              m_${sep}_ctrl_tlast,  s_${sep}_ctrl_tlast;
   wire              m_${sep}_ctrl_tvalid, s_${sep}_ctrl_tvalid;
   wire              m_${sep}_ctrl_tready, s_${sep}_ctrl_tready;
 
@@ -53,19 +53,19 @@ else:
     .MTU                (MTU),
     .REPORT_STRM_ERRS   (1)
   ) ${sep}_i (
-    .rfnoc_chdr_clk     (rfnoc_chdr_clk    ),
-    .rfnoc_chdr_rst     (rfnoc_chdr_rst    ),
-    .rfnoc_ctrl_clk     (rfnoc_ctrl_clk    ),
-    .rfnoc_ctrl_rst     (rfnoc_ctrl_rst    ),
-    .device_id          (device_id         ),
-    .s_axis_chdr_tdata  (xb_to_${sep}_tdata  ),
-    .s_axis_chdr_tlast  (xb_to_${sep}_tlast  ),
-    .s_axis_chdr_tvalid (xb_to_${sep}_tvalid ),
-    .s_axis_chdr_tready (xb_to_${sep}_tready ),
-    .m_axis_chdr_tdata  (${sep}_to_xb_tdata  ),
-    .m_axis_chdr_tlast  (${sep}_to_xb_tlast  ),
-    .m_axis_chdr_tvalid (${sep}_to_xb_tvalid ),
-    .m_axis_chdr_tready (${sep}_to_xb_tready ),
+    .rfnoc_chdr_clk     (rfnoc_chdr_clk),
+    .rfnoc_chdr_rst     (rfnoc_chdr_rst),
+    .rfnoc_ctrl_clk     (rfnoc_ctrl_clk),
+    .rfnoc_ctrl_rst     (rfnoc_ctrl_rst),
+    .device_id          (device_id),
+    .s_axis_chdr_tdata  (xb_to_${sep}_tdata),
+    .s_axis_chdr_tlast  (xb_to_${sep}_tlast),
+    .s_axis_chdr_tvalid (xb_to_${sep}_tvalid),
+    .s_axis_chdr_tready (xb_to_${sep}_tready),
+    .m_axis_chdr_tdata  (${sep}_to_xb_tdata),
+    .m_axis_chdr_tlast  (${sep}_to_xb_tlast),
+    .m_axis_chdr_tvalid (${sep}_to_xb_tvalid),
+    .m_axis_chdr_tready (${sep}_to_xb_tready),
     .s_axis_data_tdata  ({${axis_inputs[sep].format(sep,"tdata")}}),
     .s_axis_data_tlast  ({${axis_inputs[sep].format(sep,"tlast")}}),
     .s_axis_data_tvalid ({${axis_inputs[sep].format(sep,"tvalid")}}),
@@ -74,18 +74,18 @@ else:
     .m_axis_data_tlast  ({${axis_outputs[sep].format(sep,"tlast")}}),
     .m_axis_data_tvalid ({${axis_outputs[sep].format(sep,"tvalid")}}),
     .m_axis_data_tready ({${axis_outputs[sep].format(sep,"tready")}}),
-    .s_axis_ctrl_tdata  (s_${sep}_ctrl_tdata ),
-    .s_axis_ctrl_tlast  (s_${sep}_ctrl_tlast ),
+    .s_axis_ctrl_tdata  (s_${sep}_ctrl_tdata),
+    .s_axis_ctrl_tlast  (s_${sep}_ctrl_tlast),
     .s_axis_ctrl_tvalid (s_${sep}_ctrl_tvalid),
     .s_axis_ctrl_tready (s_${sep}_ctrl_tready),
-    .m_axis_ctrl_tdata  (m_${sep}_ctrl_tdata ),
-    .m_axis_ctrl_tlast  (m_${sep}_ctrl_tlast ),
+    .m_axis_ctrl_tdata  (m_${sep}_ctrl_tdata),
+    .m_axis_ctrl_tlast  (m_${sep}_ctrl_tlast),
     .m_axis_ctrl_tvalid (m_${sep}_ctrl_tvalid),
     .m_axis_ctrl_tready (m_${sep}_ctrl_tready),
-    .strm_seq_err_stb   (                  ),
-    .strm_data_err_stb  (                  ),
-    .strm_route_err_stb (                  ),
-    .signal_data_err    (1'b0              )
+    .strm_seq_err_stb   (),
+    .strm_data_err_stb  (),
+    .strm_route_err_stb (),
+    .signal_data_err    (1'b0)
   );
 
 %endfor
diff --git a/host/python/uhd/imgbuilder/templates/rfnoc_image_core.v.mako b/host/python/uhd/imgbuilder/templates/rfnoc_image_core.v.mako
index a18ff53a1..c83ddf5f5 100644
--- a/host/python/uhd/imgbuilder/templates/rfnoc_image_core.v.mako
+++ b/host/python/uhd/imgbuilder/templates/rfnoc_image_core.v.mako
@@ -5,10 +5,16 @@
 //
 // ${config.license}
 //
-
 // Module: rfnoc_image_core (for ${config.device.type})
-// This file was autogenerated by UHD's image builder tool (rfnoc_image_builder)
-// Re-running that tool will overwrite this file!
+//
+// Description:
+//
+//   The RFNoC Image Core contains the Verilog description of the RFNoC design
+//   to be loaded onto the FPGA.
+//
+//   This file was automatically generated by the RFNoC image builder tool.
+//   Re-running that tool will overwrite this file!
+//
 // File generated on: ${datetime.datetime.now().isoformat()}
 % if source:
 // Source: ${source}
@@ -16,10 +22,14 @@
 % if source_hash:
 // Source SHA256: ${source_hash}
 % endif
+//
+
+`default_nettype none
+
 
 module rfnoc_image_core #(
   parameter [15:0] PROTOVER = {8'd1, 8'd0}
-)(
+) (
   // Clocks
   input  wire         chdr_aclk,
   input  wire         ctrl_aclk,
@@ -28,21 +38,24 @@ module rfnoc_image_core #(
   input  wire         ${clock["name"]}_clk,
 %endfor
   // Basic
-  input  wire [15:0]  device_id,
+  input  wire [  15:0] device_id,
+
 <%include file="/modules/device_io_ports.v.mako" args="io_ports=config.device.io_ports"/>\
 <%include file="/modules/device_transport.v.mako" args="transports=config.device.transports"/>\
 );
 
-  localparam CHDR_W = 64;
-  localparam MTU    = 10;
+  localparam CHDR_W        = 64;
+  localparam MTU           = 10;
   localparam EDGE_TBL_FILE = `"`RFNOC_EDGE_TBL_FILE`";
 
   wire rfnoc_chdr_clk, rfnoc_chdr_rst;
   wire rfnoc_ctrl_clk, rfnoc_ctrl_rst;
 
-  // ----------------------------------------------------
+
+  //---------------------------------------------------------------------------
   // CHDR Crossbar
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
+
 <%include file="/modules/sep_xb_wires.v.mako" args="seps=config.stream_endpoints"/>\
 
   chdr_crossbar_nxn #(
@@ -67,29 +80,31 @@ module rfnoc_image_core #(
     .ext_rtcfg_ack  ()
   );
 
-  // ----------------------------------------------------
+
+  //---------------------------------------------------------------------------
   // Stream Endpoints
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
 
 <%include file="/modules/stream_endpoints.v.mako" args="seps=config.stream_endpoints"/>\
-
 <%
     from collections import OrderedDict
     ctrl_seps = OrderedDict((k, v) for k, v in config.stream_endpoints.items() if v.get('ctrl'))
 %>
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
   // Control Crossbar
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
 
-  wire [31:0]       m_core_ctrl_tdata , s_core_ctrl_tdata ;
-  wire              m_core_ctrl_tlast , s_core_ctrl_tlast ;
-  wire              m_core_ctrl_tvalid, s_core_ctrl_tvalid;
-  wire              m_core_ctrl_tready, s_core_ctrl_tready;
+  wire [31:0] m_core_ctrl_tdata,  s_core_ctrl_tdata;
+  wire        m_core_ctrl_tlast,  s_core_ctrl_tlast;
+  wire        m_core_ctrl_tvalid, s_core_ctrl_tvalid;
+  wire        m_core_ctrl_tready, s_core_ctrl_tready;
 <%include file="/modules/ctrl_crossbar.v.mako" args="seps=ctrl_seps, blocks=config.noc_blocks"/>\
 
-  // ----------------------------------------------------
+
+  //---------------------------------------------------------------------------
   // RFNoC Core Kernel
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
+
   wire [(512*${len(config.noc_blocks)})-1:0] rfnoc_core_config, rfnoc_core_status;
 
   rfnoc_core_kernel #(
@@ -114,12 +129,12 @@ module rfnoc_image_core #(
     .core_chdr_rst      (rfnoc_chdr_rst),
     .core_ctrl_clk      (rfnoc_ctrl_clk),
     .core_ctrl_rst      (rfnoc_ctrl_rst),
-    .s_axis_ctrl_tdata  (s_core_ctrl_tdata ),
-    .s_axis_ctrl_tlast  (s_core_ctrl_tlast ),
+    .s_axis_ctrl_tdata  (s_core_ctrl_tdata),
+    .s_axis_ctrl_tlast  (s_core_ctrl_tlast),
     .s_axis_ctrl_tvalid (s_core_ctrl_tvalid),
     .s_axis_ctrl_tready (s_core_ctrl_tready),
-    .m_axis_ctrl_tdata  (m_core_ctrl_tdata ),
-    .m_axis_ctrl_tlast  (m_core_ctrl_tlast ),
+    .m_axis_ctrl_tdata  (m_core_ctrl_tdata),
+    .m_axis_ctrl_tlast  (m_core_ctrl_tlast),
     .m_axis_ctrl_tvalid (m_core_ctrl_tvalid),
     .m_axis_ctrl_tready (m_core_ctrl_tready),
     .device_id          (device_id),
@@ -127,33 +142,43 @@ module rfnoc_image_core #(
     .rfnoc_core_status  (rfnoc_core_status)
   );
 
-  // ----------------------------------------------------
+
+  //---------------------------------------------------------------------------
   // Blocks
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
 %for i, name in enumerate(config.noc_blocks):
-<%include file="/modules/rfnoc_block.v.mako" args="block_id=i + len(ctrl_seps) + 1, block_number=i, block_name=name, block=config.blocks[config.noc_blocks[name]['block_desc']], block_params=config.noc_blocks[name]['parameters'], block_ports=config.block_ports"/>
+<%include file="/modules/rfnoc_block.v.mako" args="block_id=i + len(ctrl_seps) + 1, block_number=i, block_name=name, block=config.blocks[config.noc_blocks[name]['block_desc']], block_params=config.noc_blocks[name]['parameters'], block_ports=config.block_ports"/>\
 %endfor
 
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
   // Static Router
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
+
 <%include file="/modules/static_router.v.mako" args="connections=config.block_con"/>\
 
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
   // Unused Ports
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
+
 <%include file="/modules/drive_unused_ports.v.mako" args="connections=config.block_con, block_ports=config.block_ports"/>\
 
-  // ----------------------------------------------------
+
+  //---------------------------------------------------------------------------
   // Clock Domains
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
+
 <%include file="/modules/connect_clk_domains.v.mako" args="connections=config.clk_domain_con, clocks=config.clocks"/>\
 
-  // ----------------------------------------------------
+
+  //---------------------------------------------------------------------------
   // IO Port Connection
-  // ----------------------------------------------------
+  //---------------------------------------------------------------------------
+
   // Master/Slave Connections:
 <%include file="/modules/connect_io_ports.v.mako" args="connections=config.io_port_con_ms, io_ports=config.io_ports, names=('master', 'slave')"/>\
   // Broadcaster/Listener Connections:
 <%include file="/modules/connect_io_ports.v.mako" args="connections=config.io_port_con_bl, io_ports=config.io_ports, names=('broadcaster', 'listener')"/>\
 endmodule
+
+
+`default_nettype wire