mg: Make CPLD API more fine-grained

All ATR settings were on one big API call for each TX and RX,
respectively. This splits up the ATR settings into related components,
such as:
- Antenna input for RX side
- Frequency-related (RX LNAs)
- TRX switch

3 files changed, 250 insertions, 99 deletions

diff --git a/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp b/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp
index dac8ca5c1..71aa43132 100644
--- a/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp
+++ b/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp
@@ -84,7 +84,6 @@ uint16_t magnesium_cpld_ctrl::get_scratch()
 
 void magnesium_cpld_ctrl::set_tx_switches(
     const chan_sel_t chan,
-    const sw_trx_t trx_sw,
     const tx_sw1_t tx_sw1,
     const tx_sw2_t tx_sw2,
     const tx_sw3_t tx_sw3,
@@ -96,7 +95,6 @@ void magnesium_cpld_ctrl::set_tx_switches(
     std::lock_guard<std::mutex> l(_set_mutex);
     if (chan == CHAN1 or chan == BOTH) {
         if (atr_state == IDLE or atr_state == ANY) {
-            _regs.ch1_idle_sw_trx = magnesium_cpld_regs_t::ch1_idle_sw_trx_t(trx_sw);
             _regs.ch1_idle_tx_sw1 = magnesium_cpld_regs_t::ch1_idle_tx_sw1_t(tx_sw1);
             _regs.ch1_idle_tx_sw2 = magnesium_cpld_regs_t::ch1_idle_tx_sw2_t(tx_sw2);
             _regs.ch1_idle_tx_sw3 = magnesium_cpld_regs_t::ch1_idle_tx_sw3_t(tx_sw3);
@@ -199,7 +197,6 @@ void magnesium_cpld_ctrl::set_tx_atr_bits(
     const chan_sel_t chan,
     const atr_state_t atr_state,
     const bool tx_led,
-    const sw_trx_t trx_sw,
     const bool tx_pa_enb,
     const bool tx_amp_enb,
     const bool tx_myk_en,
@@ -209,14 +206,12 @@ void magnesium_cpld_ctrl::set_tx_atr_bits(
     if (chan == CHAN1 or chan == BOTH) {
         if (atr_state == IDLE or atr_state == ANY) {
             _regs.ch1_idle_tx_led = tx_led;
-            _regs.ch1_idle_sw_trx = magnesium_cpld_regs_t::ch1_idle_sw_trx_t(trx_sw);
             _regs.ch1_idle_tx_pa_en = tx_pa_enb;
             _regs.ch1_idle_tx_amp_en = tx_amp_enb;
             _regs.ch1_idle_tx_myk_en = tx_myk_en;
         }
         if (atr_state == ON or atr_state == ANY) {
             _regs.ch1_on_tx_led = tx_led;
-            _regs.ch1_on_sw_trx = magnesium_cpld_regs_t::ch1_on_sw_trx_t(trx_sw);
             _regs.ch1_on_tx_pa_en = tx_pa_enb;
             _regs.ch1_on_tx_amp_en = tx_amp_enb;
             _regs.ch1_on_tx_myk_en = tx_myk_en;
@@ -225,14 +220,12 @@ void magnesium_cpld_ctrl::set_tx_atr_bits(
     if (chan == CHAN2 or chan == BOTH) {
         if (atr_state == IDLE or atr_state == ANY) {
             _regs.ch2_idle_tx_led = tx_led;
-            _regs.ch2_idle_sw_trx = magnesium_cpld_regs_t::ch2_idle_sw_trx_t(trx_sw);
             _regs.ch2_idle_tx_pa_en = tx_pa_enb;
             _regs.ch2_idle_tx_amp_en = tx_amp_enb;
             _regs.ch2_idle_tx_myk_en = tx_myk_en;
         }
         if (atr_state == ON or atr_state == ANY) {
             _regs.ch2_on_tx_led = tx_led;
-            _regs.ch2_on_sw_trx = magnesium_cpld_regs_t::ch2_on_sw_trx_t(trx_sw);
             _regs.ch2_on_tx_pa_en = tx_pa_enb;
             _regs.ch2_on_tx_amp_en = tx_amp_enb;
             _regs.ch2_on_tx_myk_en = tx_myk_en;
@@ -243,55 +236,105 @@ void magnesium_cpld_ctrl::set_tx_atr_bits(
     }
 }
 
-void magnesium_cpld_ctrl::set_rx_atr_bits(
+void magnesium_cpld_ctrl::set_trx_sw_atr_bits(
+    const chan_sel_t chan,
+    const atr_state_t atr_state,
+    const sw_trx_t trx_sw,
+    const bool defer_commit
+) {
+    std::lock_guard<std::mutex> l(_set_mutex);
+    if (chan == CHAN1 or chan == BOTH) {
+        if (atr_state == IDLE or atr_state == ANY) {
+            _regs.ch1_idle_sw_trx =
+                magnesium_cpld_regs_t::ch1_idle_sw_trx_t(trx_sw);
+        }
+        if (atr_state == ON or atr_state == ANY) {
+            _regs.ch1_on_sw_trx =
+                magnesium_cpld_regs_t::ch1_on_sw_trx_t(trx_sw);
+        }
+    }
+    if (chan == CHAN2 or chan == BOTH) {
+        if (atr_state == IDLE or atr_state == ANY) {
+            _regs.ch2_idle_sw_trx =
+                magnesium_cpld_regs_t::ch2_idle_sw_trx_t(trx_sw);
+        }
+        if (atr_state == ON or atr_state == ANY) {
+            _regs.ch2_on_sw_trx =
+                magnesium_cpld_regs_t::ch2_on_sw_trx_t(trx_sw);
+        }
+    }
+    if (not defer_commit) {
+        commit();
+    }
+}
+
+void magnesium_cpld_ctrl::set_rx_input_atr_bits(
     const chan_sel_t chan,
     const atr_state_t atr_state,
     const rx_sw1_t rx_sw1,
     const bool rx_led,
     const bool rx2_led,
-    const bool rx_lna1_enb,
-    const bool rx_lna2_enb,
-    const bool rx_amp_enb,
-    const bool rx_myk_en,
     const bool defer_commit
 ) {
     std::lock_guard<std::mutex> l(_set_mutex);
     if (chan == CHAN1 or chan == BOTH) {
         if (atr_state == IDLE or atr_state == ANY) {
-            _regs.ch1_idle_rx_sw1 = magnesium_cpld_regs_t::ch1_idle_rx_sw1_t(rx_sw1);
+            _regs.ch1_idle_rx_sw1 =
+                magnesium_cpld_regs_t::ch1_idle_rx_sw1_t(rx_sw1);
             _regs.ch1_idle_rx_led = rx_led;
             _regs.ch1_idle_rx2_led = rx2_led;
-            _regs.ch1_idle_rx_lna1_en = rx_lna1_enb;
-            _regs.ch1_idle_rx_lna2_en = rx_lna2_enb;
-            _regs.ch1_idle_rx_amp_en = rx_amp_enb;
-            _regs.ch1_idle_rx_myk_en = rx_myk_en;
         }
         if (atr_state == ON or atr_state == ANY) {
-            _regs.ch1_on_rx_sw1 = magnesium_cpld_regs_t::ch1_on_rx_sw1_t(rx_sw1);
+            _regs.ch1_on_rx_sw1 =
+                magnesium_cpld_regs_t::ch1_on_rx_sw1_t(rx_sw1);
             _regs.ch1_on_rx_led = rx_led;
             _regs.ch1_on_rx2_led = rx2_led;
-            _regs.ch1_on_rx_lna1_en = rx_lna1_enb;
-            _regs.ch1_on_rx_lna2_en = rx_lna2_enb;
-            _regs.ch1_on_rx_amp_en = rx_amp_enb;
-            _regs.ch1_on_rx_myk_en = rx_myk_en;
         }
     }
     if (chan == CHAN2 or chan == BOTH) {
         if (atr_state == IDLE or atr_state == ANY) {
-            _regs.ch2_idle_rx_sw1 = magnesium_cpld_regs_t::ch2_idle_rx_sw1_t(rx_sw1);
+            _regs.ch2_idle_rx_sw1 =
+                magnesium_cpld_regs_t::ch2_idle_rx_sw1_t(rx_sw1);
             _regs.ch2_idle_rx_led = rx_led;
             _regs.ch2_idle_rx2_led = rx2_led;
-            _regs.ch2_idle_rx_lna1_en = rx_lna1_enb;
-            _regs.ch2_idle_rx_lna2_en = rx_lna2_enb;
-            _regs.ch2_idle_rx_amp_en = rx_amp_enb;
-            _regs.ch2_idle_rx_myk_en = rx_myk_en;
         }
         if (atr_state == ON or atr_state == ANY) {
-            _regs.ch2_on_rx_sw1 = magnesium_cpld_regs_t::ch2_on_rx_sw1_t(rx_sw1);
+            _regs.ch2_on_rx_sw1 =
+                magnesium_cpld_regs_t::ch2_on_rx_sw1_t(rx_sw1);
             _regs.ch2_on_rx_led = rx_led;
             _regs.ch2_on_rx2_led = rx2_led;
-            _regs.ch2_on_rx_lna1_en = rx_lna1_enb;
-            _regs.ch2_on_rx_lna2_en = rx_lna2_enb;
+        }
+    }
+
+    if (not defer_commit) {
+        commit();
+    }
+}
+
+void magnesium_cpld_ctrl::set_rx_atr_bits(
+    const chan_sel_t chan,
+    const atr_state_t atr_state,
+    const bool rx_amp_enb,
+    const bool rx_myk_en,
+    const bool defer_commit
+) {
+    std::lock_guard<std::mutex> l(_set_mutex);
+    if (chan == CHAN1 or chan == BOTH) {
+        if (atr_state == IDLE or atr_state == ANY) {
+            _regs.ch1_idle_rx_amp_en = rx_amp_enb;
+            _regs.ch1_idle_rx_myk_en = rx_myk_en;
+        }
+        if (atr_state == ON or atr_state == ANY) {
+            _regs.ch1_on_rx_amp_en = rx_amp_enb;
+            _regs.ch1_on_rx_myk_en = rx_myk_en;
+        }
+    }
+    if (chan == CHAN2 or chan == BOTH) {
+        if (atr_state == IDLE or atr_state == ANY) {
+            _regs.ch2_idle_rx_amp_en = rx_amp_enb;
+            _regs.ch2_idle_rx_myk_en = rx_myk_en;
+        }
+        if (atr_state == ON or atr_state == ANY) {
             _regs.ch2_on_rx_amp_en = rx_amp_enb;
             _regs.ch2_on_rx_myk_en = rx_myk_en;
         }
@@ -302,6 +345,40 @@ void magnesium_cpld_ctrl::set_rx_atr_bits(
     }
 }
 
+void magnesium_cpld_ctrl::set_rx_lna_atr_bits(
+    const chan_sel_t chan,
+    const atr_state_t atr_state,
+    const bool rx_lna1_enb,
+    const bool rx_lna2_enb,
+    const bool defer_commit
+) {
+    std::lock_guard<std::mutex> l(_set_mutex);
+    if (chan == CHAN1 or chan == BOTH) {
+        if (atr_state == IDLE or atr_state == ANY) {
+            _regs.ch1_idle_rx_lna1_en = rx_lna1_enb;
+            _regs.ch1_idle_rx_lna2_en = rx_lna2_enb;
+        }
+        if (atr_state == ON or atr_state == ANY) {
+            _regs.ch1_on_rx_lna1_en = rx_lna1_enb;
+            _regs.ch1_on_rx_lna2_en = rx_lna2_enb;
+        }
+    }
+    if (chan == CHAN2 or chan == BOTH) {
+        if (atr_state == IDLE or atr_state == ANY) {
+            _regs.ch2_idle_rx_lna1_en = rx_lna1_enb;
+            _regs.ch2_idle_rx_lna2_en = rx_lna2_enb;
+        }
+        if (atr_state == ON or atr_state == ANY) {
+            _regs.ch2_on_rx_lna1_en = rx_lna1_enb;
+            _regs.ch2_on_rx_lna2_en = rx_lna2_enb;
+        }
+    }
+
+    if (not defer_commit) {
+        commit();
+    }
+}
+
 
 /******************************************************************************
  * Private methods
diff --git a/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp b/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp
index ad369df99..a1e9bf3a3 100644
--- a/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp
+++ b/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp
@@ -157,10 +157,6 @@ public:
 
     /*! Frequency-related settings, transmit side
      *
-     * Note: The TRX switch is also a frequency-dependent setting, but it's
-     * also tied to ATR state. For that reason, its configuration is done by
-     * set_tx_atr_bits().
-     *
      * \param chan Which channel do these settings apply to? Use BOTH to set
      *             both channels at once.
      * \param tx_sw1 Filter bank switch 1
@@ -173,7 +169,6 @@ public:
      */
     void set_tx_switches(
         const chan_sel_t chan,
-        const sw_trx_t trx_sw,
         const tx_sw1_t tx_sw1,
         const tx_sw2_t tx_sw2,
         const tx_sw3_t tx_sw3,
@@ -214,6 +209,8 @@ public:
 
     /*! ATR settings: LEDs, PAs, LNAs, ... for TX side
      *
+     * Note: These ATR states are not frequency dependent.
+     *
      * Note on the tx_myk_enb bits: The AD9371 requires those pins to stay
      * high for longer than we can guarantee with out clock-cycle accurate
      * TX timing, so let's keep it turned on all the time.
@@ -222,7 +219,6 @@ public:
      *             both channels at once.
      * \param atr_state TX state for which these settings apply.
      * \param tx_led State of the TX LED for this ATR state (on or off)
-     * \param trx_sw State of the TRX switch for this ATR state
      * \param tx_pa_enb State of the TX PA for this ATR state (on or off)
      * \param tx_amp_enb State of the TX amp for this ATR state (on or off)
      * \param tx_myk_enb State of the AD9371 TX enable pin for this ATR state
@@ -231,44 +227,95 @@ public:
         const chan_sel_t chan,
         const atr_state_t atr_state,
         const bool tx_led,
-        const sw_trx_t trx_sw,
         const bool tx_pa_enb,
         const bool tx_amp_enb,
         const bool tx_myk_enb,
         const bool defer_commit = false
     );
 
-    /*! ATR settings: LEDs, PAs, LNAs, ... for RX side
+    /*! ATR settings: TRX switch
      *
-     * Note on the rx_myk_enb bits: The AD9371 requires those pins to stay
-     * high for longer than we can guarantee with out clock-cycle accurate
-     * RX timing, so let's keep it turned on all the time.
+     * Note: This ATR state is frequency dependent.
      *
      * \param chan Which channel do these settings apply to? Use BOTH to set
      *             both channels at once.
      * \param atr_state TX state for which these settings apply.
+     * \param trx_sw State of the TRX switch for this ATR state
+     */
+    void set_trx_sw_atr_bits(
+        const chan_sel_t chan,
+        const atr_state_t atr_state,
+        const sw_trx_t trx_sw,
+        const bool defer_commit = false
+    );
+
+    /*! ATR settings: LEDs, input switches for RX side
+     *
+     * Note: These ATR states are not frequency dependent, but need to change
+     * when the antenna input is switched.
+     *
+     * \param chan Which channel do these settings apply to? Use BOTH to set
+     *             both channels at once.
+     * \param atr_state ATR state for which these settings apply.
      * \param rx_sw1 Filter bank sw1 of RX path
      * \param rx_led State of the RX LED for this ATR state (on or off). This
      *               is the LED on the TX/RX port.
      * \param rx2_led State of the RX LED for this ATR state (on or off). This
      *               is the LED on the RX2 port.
+     */
+    void set_rx_input_atr_bits(
+        const chan_sel_t chan,
+        const atr_state_t atr_state,
+        const rx_sw1_t rx_sw1,
+        const bool rx_led,
+        const bool rx2_led,
+        const bool defer_commit = false
+    );
+
+    /*! ATR settings: LEDs, input switches for RX side
+     *
+     * Note: These ATR states are not frequency dependent (or dependent on
+     * anything other than RX ATR state).
+     *
+     * Note on the rx_myk_enb bits: The AD9371 requires those pins to stay
+     * high for longer than we can guarantee without clock-cycle accurate
+     * RX timing, so let's keep it turned on all the time.
+     *
+     * \param chan Which channel do these settings apply to? Use BOTH to set
+     *             both channels at once.
+     * \param atr_state ATR state for which these settings apply.
+     * \param rx_amp_enb State of RX amp for this ATR state (on or off).
+     * \param rx_myk_enb State of the AD9371 RX enable pin for this ATR state
+     */
+    void set_rx_atr_bits(
+        const chan_sel_t chan,
+        const atr_state_t atr_state,
+        const bool rx_amp_enb,
+        const bool rx_myk_en,
+        const bool defer_commit = false
+    );
+
+    /*! ATR settings: LNAs for RX side
+     *
+     * Note: These ATR states are frequency dependent.
+     *
+     * Note on the rx_myk_enb bits: The AD9371 requires those pins to stay
+     * high for longer than we can guarantee with out clock-cycle accurate
+     * RX timing, so let's keep it turned on all the time.
+     *
+     * \param chan Which channel do these settings apply to? Use BOTH to set
+     *             both channels at once.
+     * \param atr_state ATR state for which these settings apply.
      * \param rx_lna1_enb State of RX LNA 1 for this ATR state (on or off).
      *                    This is the high-band LNA.
      * \param rx_lna2_enb State of RX LNA 2 for this ATR state (on or off).
      *                    This is the low-band LNA.
-     * \param rx_amp_enb State of RX amp for this ATR state (on or off).
-     * \param rx_myk_enb State of the AD9371 RX enable pin for this ATR state
      */
-    void set_rx_atr_bits(
+    void set_rx_lna_atr_bits(
         const chan_sel_t chan,
         const atr_state_t atr_state,
-        const rx_sw1_t rx_sw1,
-        const bool rx_led,
-        const bool rx2_led,
         const bool rx_lna1_enb,
         const bool rx_lna2_enb,
-        const bool rx_amp_enb,
-        const bool rx_myk_en,
         const bool defer_commit = false
     );
 
diff --git a/host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_cpld.cpp b/host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_cpld.cpp
index fa0c7cba5..5b8cb5f70 100644
--- a/host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_cpld.cpp
+++ b/host/lib/usrp/dboard/magnesium/magnesium_radio_ctrl_cpld.cpp
@@ -45,6 +45,7 @@ void magnesium_radio_ctrl_impl::_update_atr_switches(
     const direction_t dir,
     const std::string &ant
 ){
+    UHD_ASSERT_THROW(dir == RX_DIRECTION or dir == TX_DIRECTION);
     magnesium_cpld_ctrl::rx_sw1_t rx_sw1 = magnesium_cpld_ctrl::RX_SW1_RX2INPUT;
     magnesium_cpld_ctrl::sw_trx_t sw_trx = _sw_trx[chan];
 
@@ -56,60 +57,58 @@ void magnesium_radio_ctrl_impl::_update_atr_switches(
         trx_led = true;
         rx2_led = false;
     }
-    UHD_LOG_TRACE(unique_id(), "Update all atr related switches for " << dir << " " << ant );
-    if (dir == RX_DIRECTION){
-        _cpld->set_rx_atr_bits(
+    if (dir == RX_DIRECTION) {
+        UHD_LOG_TRACE(unique_id(),
+            "Updating all RX-ATR related switches for antenna==" << ant);
+        _cpld->set_rx_input_atr_bits(
             chan,
             magnesium_cpld_ctrl::ON,
             rx_sw1,
             trx_led,
             rx2_led,
-            true,
-            true,
-            true,
-            true
+            true /* defer commit */
         );
-        _cpld->set_tx_atr_bits(
+        _cpld->set_rx_atr_bits(
             chan,
-            magnesium_cpld_ctrl::IDLE,
-            false,
-            sw_trx,
-            false,
-            false,
-            false
+            magnesium_cpld_ctrl::ON,
+            true,  /* amp on       */
+            true,  /* mykonos on   */
+            true   /* defer commit */
         );
         _cpld->set_rx_atr_bits(
             chan,
             magnesium_cpld_ctrl::IDLE,
-            rx_sw1,
-            false,
-            false,
-            false,
-            false,
-            false,
-            true
+            false, /* amp off      */
+            true,  /* mykonos on   */
+            true   /* defer commit */
+        );
+        _cpld->set_trx_sw_atr_bits(
+            chan,
+            magnesium_cpld_ctrl::IDLE, /* idle here means TX is off */
+            sw_trx,
+            false /* don't defer commit */
         );
     }
-    if (dir == TX_DIRECTION){
+    if (dir == TX_DIRECTION) {
+        UHD_LOG_TRACE(unique_id(),
+            "Updating all TX-ATR related switches for antenna==" << ant);
         _cpld->set_tx_atr_bits(
             chan,
             magnesium_cpld_ctrl::ON,
-            true,
-            sw_trx,
-            true,
-            true,
-            true
+            true, /* LED on */
+            true, /* PA on  */
+            true, /* AMP on */
+            true, /* Myk on */
+            true  /* defer commit */
         );
-        _cpld->set_rx_atr_bits(
+        _cpld->set_tx_atr_bits(
             chan,
             magnesium_cpld_ctrl::IDLE,
-            rx_sw1,
-            false,
-            false,
-            false,
-            false,
-            false,
-            true
+            false, /* LED off */
+            false, /* PA off  */
+            false, /* AMP off */
+            true,  /* Myk on  */
+            false  /* don't defer commit */
         );
     };
 }
@@ -132,7 +131,7 @@ void magnesium_radio_ctrl_impl::_update_rx_freq_switches(
             magnesium_cpld_ctrl::RX_SW5_FILTER0490LPMHZFROM,
             magnesium_cpld_ctrl::RX_SW6_LOWERFILTERBANKFROMSWITCH5,
             magnesium_cpld_ctrl::LOWBAND_MIXER_PATH_SEL_LOBAND,
-            true
+            true // Enable lowband mixer
         );
     } else if (freq < MAGNESIUM_RX_BAND2_MIN_FREQ) {
         _cpld->set_rx_switches(
@@ -215,33 +214,52 @@ void magnesium_radio_ctrl_impl::_update_tx_freq_switches(
 
      // Set filters based on frequency
     if (freq < MAGNESIUM_TX_BAND1_MIN_FREQ) {
+        _sw_trx[chan_sel] =
+            magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1;
+        _cpld->set_trx_sw_atr_bits(
+            magnesium_cpld_ctrl::BOTH,
+            magnesium_cpld_ctrl::ON,
+            _sw_trx[chan_sel],
+            true /* defer commit */
+        );
         _cpld->set_tx_switches(
             magnesium_cpld_ctrl::BOTH,
-            magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1,
             magnesium_cpld_ctrl::TX_SW1_FROMTXFILTERLP0800MHZ,
             magnesium_cpld_ctrl::TX_SW2_TOTXFILTERLP0800MHZ,
             magnesium_cpld_ctrl::TX_SW3_TOTXFILTERBANKS,
             magnesium_cpld_ctrl::LOWBAND_MIXER_PATH_SEL_LOBAND,
-            true,
+            true, // Enable lowband mixer
             magnesium_cpld_ctrl::ON
         );
-        _sw_trx[chan_sel] = magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1;
     } else if (freq < MAGNESIUM_TX_BAND2_MIN_FREQ) {
+        _sw_trx[chan_sel] =
+            magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1;
+        _cpld->set_trx_sw_atr_bits(
+            magnesium_cpld_ctrl::BOTH,
+            magnesium_cpld_ctrl::ON,
+            _sw_trx[chan_sel],
+            true /* defer commit */
+        );
         _cpld->set_tx_switches(
             magnesium_cpld_ctrl::BOTH,
-            magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1,
             magnesium_cpld_ctrl::TX_SW1_FROMTXFILTERLP0800MHZ,
             magnesium_cpld_ctrl::TX_SW2_TOTXFILTERLP0800MHZ,
             magnesium_cpld_ctrl::TX_SW3_TOTXFILTERBANKS,
             magnesium_cpld_ctrl::LOWBAND_MIXER_PATH_SEL_BYPASS,
-            false,
+            false, // Disable lowband mixer
             magnesium_cpld_ctrl::ON
         );
-        _sw_trx[chan_sel] = magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1;
     } else if (freq < MAGNESIUM_TX_BAND3_MIN_FREQ) {
+        _sw_trx[chan_sel] =
+            magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1;
+        _cpld->set_trx_sw_atr_bits(
+            magnesium_cpld_ctrl::BOTH,
+            magnesium_cpld_ctrl::ON,
+            _sw_trx[chan_sel],
+            true /* defer commit */
+        );
         _cpld->set_tx_switches(
             magnesium_cpld_ctrl::BOTH,
-            magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1,
             magnesium_cpld_ctrl::TX_SW1_FROMTXFILTERLP1700MHZ,
             magnesium_cpld_ctrl::TX_SW2_TOTXFILTERLP1700MHZ,
             magnesium_cpld_ctrl::TX_SW3_TOTXFILTERBANKS,
@@ -249,11 +267,17 @@ void magnesium_radio_ctrl_impl::_update_tx_freq_switches(
             false,
             magnesium_cpld_ctrl::ON
         );
-        _sw_trx[chan_sel] = magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1;
     } else if (freq < MAGNESIUM_TX_BAND4_MIN_FREQ) {
+        _sw_trx[chan_sel] =
+            magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1;
+        _cpld->set_trx_sw_atr_bits(
+            magnesium_cpld_ctrl::BOTH,
+            magnesium_cpld_ctrl::ON,
+            _sw_trx[chan_sel],
+            true /* defer commit */
+        );
         _cpld->set_tx_switches(
             magnesium_cpld_ctrl::BOTH,
-            magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1,
             magnesium_cpld_ctrl::TX_SW1_FROMTXFILTERLP3400MHZ,
             magnesium_cpld_ctrl::TX_SW2_TOTXFILTERLP3400MHZ,
             magnesium_cpld_ctrl::TX_SW3_TOTXFILTERBANKS,
@@ -261,11 +285,17 @@ void magnesium_radio_ctrl_impl::_update_tx_freq_switches(
             false,
             magnesium_cpld_ctrl::ON
         );
-        _sw_trx[chan_sel] = magnesium_cpld_ctrl::SW_TRX_FROMLOWERFILTERBANKTXSW1;
     } else {
+        _sw_trx[chan_sel] =
+            magnesium_cpld_ctrl::SW_TRX_FROMTXUPPERFILTERBANKLP6400MHZ;
+        _cpld->set_trx_sw_atr_bits(
+            magnesium_cpld_ctrl::BOTH,
+            magnesium_cpld_ctrl::ON,
+            _sw_trx[chan_sel],
+            true /* defer commit */
+        );
         _cpld->set_tx_switches(
             magnesium_cpld_ctrl::BOTH,
-            magnesium_cpld_ctrl::SW_TRX_FROMTXUPPERFILTERBANKLP6400MHZ,
             magnesium_cpld_ctrl::TX_SW1_SHUTDOWNTXSW1,
             magnesium_cpld_ctrl::TX_SW2_TOTXFILTERLP6400MHZ,
             magnesium_cpld_ctrl::TX_SW3_TOTXFILTERBANKS,
@@ -273,9 +303,6 @@ void magnesium_radio_ctrl_impl::_update_tx_freq_switches(
             false,
             magnesium_cpld_ctrl::ON
         );
-        _sw_trx[chan_sel] = magnesium_cpld_ctrl::SW_TRX_FROMTXUPPERFILTERBANKLP6400MHZ;
     }
 }
 
-
-