dsp rework: move setting address of format register

2 files changed, 4 insertions, 6 deletions

diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index 7b35daa42..d9ca84e0f 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -44,7 +44,7 @@
 #define REG_RX_CTRL_VRT_TLR        _ctrl_base + 24
 #define REG_RX_CTRL_NSAMPS_PP      _ctrl_base + 28
 #define REG_RX_CTRL_NCHANNELS      _ctrl_base + 32
-#define REG_RX_CTRL_FORMAT         _ctrl_base + 36
+#define REG_RX_CTRL_FORMAT         REG_RX_CTRL_CLEAR //re-use clear address
 
 template <class T> T ceil_log2(T num){
     return std::ceil(std::log(num)/std::log(T(2)));
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index 15358e184..e25528213 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -30,13 +30,12 @@
 #define REG_DSP_TX_SCALE_IQ      _dsp_base + 4
 #define REG_DSP_TX_INTERP        _dsp_base + 8
 
-#define REG_TX_CTRL_NUM_CHAN        _ctrl_base + 0
-#define REG_TX_CTRL_CLEAR_STATE     _ctrl_base + 4
+#define REG_TX_CTRL_CLEAR           _ctrl_base + 4
 #define REG_TX_CTRL_REPORT_SID      _ctrl_base + 8
 #define REG_TX_CTRL_POLICY          _ctrl_base + 12
 #define REG_TX_CTRL_CYCLES_PER_UP   _ctrl_base + 16
 #define REG_TX_CTRL_PACKETS_PER_UP  _ctrl_base + 20
-#define REG_TX_CTRL_FORMAT          _ctrl_base + 24
+#define REG_TX_CTRL_FORMAT          REG_TX_CTRL_CLEAR //re-use clear address
 
 #define FLAG_TX_CTRL_POLICY_WAIT          (0x1 << 0)
 #define FLAG_TX_CTRL_POLICY_NEXT_PACKET   (0x1 << 1)
@@ -70,8 +69,7 @@ public:
     }
 
     void clear(void){
-        _iface->poke32(REG_TX_CTRL_CLEAR_STATE, 1); //reset
-        _iface->poke32(REG_TX_CTRL_NUM_CHAN, 0);    //1 channel
+        _iface->poke32(REG_TX_CTRL_CLEAR, 1); //reset
         _iface->poke32(REG_TX_CTRL_REPORT_SID, _sid);
     }