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author | Ben Hilburn <ben.hilburn@ettus.com> | 2014-07-17 17:57:23 -0700 |
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committer | Ben Hilburn <ben.hilburn@ettus.com> | 2014-07-17 17:57:23 -0700 |
commit | 1af6628eb1edf29dffae771b8f3ada6952a50b69 (patch) | |
tree | fc0a9dc0f3b36397afed1cd0ec1f93e03a4c4c8e /host | |
parent | 4e8512abf885150404c2485e641d1bf02ea4ed24 (diff) | |
parent | 0753122ccaccebb15393f6496eafc94e2b1976ec (diff) | |
download | uhd-1af6628eb1edf29dffae771b8f3ada6952a50b69.tar.gz uhd-1af6628eb1edf29dffae771b8f3ada6952a50b69.tar.bz2 uhd-1af6628eb1edf29dffae771b8f3ada6952a50b69.zip |
Merge branch 'origin/ashish/rx_pcie_overflows' into maint
Diffstat (limited to 'host')
-rw-r--r-- | host/lib/usrp/x300/x300_impl.cpp | 4 | ||||
-rw-r--r-- | host/lib/usrp/x300/x300_impl.hpp | 6 |
2 files changed, 7 insertions, 3 deletions
diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp index 2c291f422..a624ebf6b 100644 --- a/host/lib/usrp/x300/x300_impl.cpp +++ b/host/lib/usrp/x300/x300_impl.cpp @@ -1129,12 +1129,12 @@ x300_impl::both_xports_t x300_impl::make_transport( if (mb.xport_path == "nirio") { default_buff_args.send_frame_size = (prefix == X300_RADIO_DEST_PREFIX_TX) - ? X300_PCIE_DATA_FRAME_SIZE + ? X300_PCIE_TX_DATA_FRAME_SIZE : X300_PCIE_MSG_FRAME_SIZE; default_buff_args.recv_frame_size = (prefix == X300_RADIO_DEST_PREFIX_RX) - ? X300_PCIE_DATA_FRAME_SIZE + ? X300_PCIE_RX_DATA_FRAME_SIZE : X300_PCIE_MSG_FRAME_SIZE; default_buff_args.num_send_frames = diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp index 80f3e8faa..27f20fbd9 100644 --- a/host/lib/usrp/x300/x300_impl.hpp +++ b/host/lib/usrp/x300/x300_impl.hpp @@ -63,7 +63,11 @@ static const size_t X300_RX_SW_BUFF_SIZE_ETH_MACOS = 0x100000; //1Mib static const double X300_RX_SW_BUFF_FULL_FACTOR = 0.90; //Buffer should ideally be 90% full. static const size_t X300_RX_FC_REQUEST_FREQ = 32; //per flow-control window -static const size_t X300_PCIE_DATA_FRAME_SIZE = 8192; //bytes +//The FIFO closest to the DMA controller is 1023 elements deep for RX and 1029 elements deep for TX +//where an element is 8 bytes. For best throughput ensure that the data frame fits in these buffers. +//Also ensure that the kernel has enough frames to hold buffered TX and RX data +static const size_t X300_PCIE_RX_DATA_FRAME_SIZE = 8184; //bytes +static const size_t X300_PCIE_TX_DATA_FRAME_SIZE = 8192; //bytes static const size_t X300_PCIE_DATA_NUM_FRAMES = 2048; static const size_t X300_PCIE_MSG_FRAME_SIZE = 256; //bytes static const size_t X300_PCIE_MSG_NUM_FRAMES = 32; |