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| author | Josh Blum <josh@joshknows.com> | 2013-08-23 18:18:03 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2013-08-23 18:18:03 -0700 |
| commit | 7b9a7e74dcc4b40bcedc59695c827e4d1d1e7d59 (patch) | |
| tree | c8330e695661d3c24fd179a11d8902f095857280 /host | |
| parent | f8b677183937d565045939061cbd57202e388e50 (diff) | |
| download | uhd-7b9a7e74dcc4b40bcedc59695c827e4d1d1e7d59.tar.gz uhd-7b9a7e74dcc4b40bcedc59695c827e4d1d1e7d59.tar.bz2 uhd-7b9a7e74dcc4b40bcedc59695c827e4d1d1e7d59.zip | |
usrp2: fix firmware rx clear register offset
When an ICMP dest unreachable pkt arrives,
the fw needs to know how to shutoff the DSP.
This offset for the reset register was
broken by a previous fix for register overlap.
Diffstat (limited to 'host')
| -rw-r--r-- | host/lib/usrp/usrp2/fw_common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h index 7e3de1497..337a1ad6f 100644 --- a/host/lib/usrp/usrp2/fw_common.h +++ b/host/lib/usrp/usrp2/fw_common.h @@ -32,7 +32,7 @@ extern "C" { //fpga and firmware compatibility numbers #define USRP2_FPGA_COMPAT_NUM 10 #define USRP2_FW_COMPAT_NUM 12 -#define USRP2_FW_VER_MINOR 3 +#define USRP2_FW_VER_MINOR 4 //used to differentiate control packets over data port #define USRP2_INVALID_VRT_HEADER 0 |