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| author | Martin Braun <martin.braun@ettus.com> | 2019-08-20 10:00:47 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2019-11-26 12:16:25 -0800 |
| commit | 7d69dcdcc318ccdf87038b732acbf2bf7c087b60 (patch) | |
| tree | 8179f2f4a14be591d7c856f77f13687b45f9a454 /host/utils/rfnoc_blocktool | |
| parent | 1ac6e6f56100a7e8186481ab0715937759f52737 (diff) | |
| download | uhd-7d69dcdcc318ccdf87038b732acbf2bf7c087b60.tar.gz uhd-7d69dcdcc318ccdf87038b732acbf2bf7c087b60.tar.bz2 uhd-7d69dcdcc318ccdf87038b732acbf2bf7c087b60.zip | |
Remove proto-RFNoC files
This commit removes all files and parts of files that are used by
proto-RFNoC only.
uhd: Fix include CMakeLists.txt, add missing files
Diffstat (limited to 'host/utils/rfnoc_blocktool')
| -rw-r--r-- | host/utils/rfnoc_blocktool/templates/Makefile | 16 | ||||
| -rw-r--r-- | host/utils/rfnoc_blocktool/templates/Makefile.srcs | 6 |
2 files changed, 11 insertions, 11 deletions
diff --git a/host/utils/rfnoc_blocktool/templates/Makefile b/host/utils/rfnoc_blocktool/templates/Makefile index 25e61c05b..ca397bf7d 100644 --- a/host/utils/rfnoc_blocktool/templates/Makefile +++ b/host/utils/rfnoc_blocktool/templates/Makefile @@ -1,5 +1,5 @@ # -# Copyright 2019 Ettus Research, A National Instruments Company +# Copyright 2019 Ettus Research, A National Instruments Brand # # SPDX-License-Identifier: LGPL-3.0-or-later # @@ -16,26 +16,26 @@ include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak # Design Specific #------------------------------------------------- # Include makefiles and sources for the DUT and its dependencies -include $(BASE_DIR)/../lib/erfnoc/core/Makefile.srcs -include $(BASE_DIR)/../lib/erfnoc/utils/Makefile.srcs +include $(BASE_DIR)/../lib/rfnoc/core/Makefile.srcs +include $(BASE_DIR)/../lib/rfnoc/utils/Makefile.srcs include Makefile.srcs DESIGN_SRCS += $(abspath ${"\\"} $(RFNOC_CORE_SRCS) ${"\\"} $(RFNOC_UTIL_SRCS) ${"\\"} -$(RFNOC_BLOCK_${config.module_name.upper()}_SRCS) ${"\\"} +$(RFNOC_BLOCK_${config['module_name'].upper()}_SRCS) ${"\\"} ) #------------------------------------------------- # Testbench Specific #------------------------------------------------- -include $(BASE_DIR)/../sim/erfnoc/Makefile.srcs +include $(BASE_DIR)/../sim/rfnoc/Makefile.srcs -SIM_TOP = rfnoc_block_${config.module_name}_tb +SIM_TOP = rfnoc_block_${config['module_name']}_tb SIM_SRCS = ${"\\"} -$(abspath rfnoc_block_${config.module_name}_tb.sv) ${"\\"} -$(SIM_ERFNOC_SRCS) +$(abspath rfnoc_block_${config['module_name']}_tb.sv) ${"\\"} +$(SIM_RFNOC_SRCS) # MODELSIM_USER_DO = $(abspath wave.do) diff --git a/host/utils/rfnoc_blocktool/templates/Makefile.srcs b/host/utils/rfnoc_blocktool/templates/Makefile.srcs index f346007af..67fcb1ccc 100644 --- a/host/utils/rfnoc_blocktool/templates/Makefile.srcs +++ b/host/utils/rfnoc_blocktool/templates/Makefile.srcs @@ -7,7 +7,7 @@ ${'##################################################'} # RFNoC Utility Sources ${'##################################################'} -RFNOC_BLOCK_${config.module_name.upper()}_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/erfnoc/blocks/${destination}/, ${"\\"} -rfnoc_block_${config.module_name}.v ${"\\"} -noc_shell_${config.module_name}.v ${"\\"} +RFNOC_BLOCK_${config['module_name'].upper()}_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/rfnoc/blocks/${destination}/, ${"\\"} +rfnoc_block_${config['module_name']}.v ${"\\"} +noc_shell_${config['module_name']}.v ${"\\"} )) |