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| author | Wade Fife <wade.fife@ettus.com> | 2020-04-06 16:12:10 -0500 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2020-04-21 10:31:07 -0500 |
| commit | 8db85296df1843ddd851cd5b237c443bbf3e30dd (patch) | |
| tree | a77d53cc93951b7e789f1c34673b20b42d6aca03 /host/uhd.pc.in | |
| parent | 1a7f55f3bd1db83e2d9b2b2f3b0c2f8f5f5b60e3 (diff) | |
| download | uhd-8db85296df1843ddd851cd5b237c443bbf3e30dd.tar.gz uhd-8db85296df1843ddd851cd5b237c443bbf3e30dd.tar.bz2 uhd-8db85296df1843ddd851cd5b237c443bbf3e30dd.zip | |
utils: Add sideband_at_end support to Mako template
This adds a new option to the "AXI-Stream Data" (axis_data) FPGA
interface type. The new option, "sideband_at_end", can be added to the
output port of a block's YAML description to control whether the
sideband information should be sampled at the end (sideband_at_end: 1)
or the beginning (sideband_at_end: 0) of the AXI-Stream packet.
Diffstat (limited to 'host/uhd.pc.in')
0 files changed, 0 insertions, 0 deletions