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| author | Ryan Marlow <ryan.marlow@ettus.com> | 2017-12-06 09:10:45 -0500 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-12-20 16:56:48 -0800 |
| commit | d6d94bf60ed75ee237e77d1a46c8ab5c752f1121 (patch) | |
| tree | 5e4c8267f51f83f1ab3ff2c4a9f5027bf5ef0807 /host/tests/vrt_test.cpp | |
| parent | d1aebc9c23817dbaed580698edc11acd8763f883 (diff) | |
| download | uhd-d6d94bf60ed75ee237e77d1a46c8ab5c752f1121.tar.gz uhd-d6d94bf60ed75ee237e77d1a46c8ab5c752f1121.tar.bz2 uhd-d6d94bf60ed75ee237e77d1a46c8ab5c752f1121.zip | |
ddc/duc: enhance ddc/duc with new parameters
- NUM_HALFBANDS and CIC_MAX are no longer hard coded and are now
readback regs.
- both DDC and DUC use same encoding to enable halfbands
(increment the number)
- removed hacky hack & fixed get_output_rate/get_input_rate
to include only valid rates based on NUM_HALFBANDS and CIC_MAX.
- added compatibility number readback w/ warning/error messages
- Updated images package to include new DDC/DUC (affects X-Series only)
- Updated fpga-src submodule pointer
Diffstat (limited to 'host/tests/vrt_test.cpp')
0 files changed, 0 insertions, 0 deletions