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authorMartin Braun <martin.braun@ettus.com>2018-07-10 22:24:49 -0700
committerMartin Braun <martin.braun@ettus.com>2018-07-11 10:11:28 -0700
commitb185c9447a4a33bff14fd697dc294b9ee5d298b3 (patch)
treebda446edfd03f0b32d12fbbc121597bfdf7487c6 /host/tests/soft_reg_test.cpp
parent826279754529f76a0eb617cf02ade75a4145904f (diff)
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soft_register: Remove compiler warning, add unit test
Diffstat (limited to 'host/tests/soft_reg_test.cpp')
-rw-r--r--host/tests/soft_reg_test.cpp33
1 files changed, 33 insertions, 0 deletions
diff --git a/host/tests/soft_reg_test.cpp b/host/tests/soft_reg_test.cpp
new file mode 100644
index 000000000..8e53c61ca
--- /dev/null
+++ b/host/tests/soft_reg_test.cpp
@@ -0,0 +1,33 @@
+//
+// Copyright 2018 Ettus Research, a National Instruments Company
+//
+// SPDX-License-Identifier: GPL-3.0-or-later
+//
+
+#include <uhd/utils/soft_register.hpp>
+#include <boost/test/unit_test.hpp>
+
+using namespace uhd;
+
+BOOST_AUTO_TEST_CASE(test_soft_reg_field) {
+ UHD_DEFINE_SOFT_REG_FIELD(test_reg1, /* width */ 1, /* shift */ 0);
+ BOOST_CHECK_EQUAL(soft_reg_field::width(test_reg1), 1);
+ BOOST_CHECK_EQUAL(soft_reg_field::shift(test_reg1), 0);
+ BOOST_CHECK_EQUAL(soft_reg_field::mask<uint32_t>(test_reg1), 1<<0);
+
+ UHD_DEFINE_SOFT_REG_FIELD(test_reg2, /* width */ 5, /* shift */ 4);
+ BOOST_CHECK_EQUAL(soft_reg_field::width(test_reg2), 5);
+ BOOST_CHECK_EQUAL(soft_reg_field::shift(test_reg2), 4);
+ BOOST_CHECK_EQUAL(soft_reg_field::mask<uint32_t>(test_reg2), 0x1F<<4);
+
+ UHD_DEFINE_SOFT_REG_FIELD(test_reg3, /* width */ 9, /* shift */ 0);
+ BOOST_CHECK_EQUAL(soft_reg_field::width(test_reg3), 9);
+ BOOST_CHECK_EQUAL(soft_reg_field::shift(test_reg3), 0);
+ BOOST_CHECK_EQUAL(soft_reg_field::mask<uint8_t>(test_reg3), 0xFF);
+
+ // This one is platform dependent:
+ UHD_DEFINE_SOFT_REG_FIELD(test_reg4, /* width */ 33, /* shift */ 0);
+ BOOST_CHECK_EQUAL(soft_reg_field::width(test_reg4), 33);
+ BOOST_CHECK_EQUAL(soft_reg_field::shift(test_reg4), 0);
+ BOOST_CHECK_EQUAL(soft_reg_field::mask<size_t>(test_reg4), ~size_t(0) & 0x1FFFFFFFF);
+}