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| author | michael-west <michael.west@ettus.com> | 2016-12-09 16:15:40 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2016-12-09 17:22:16 -0800 |
| commit | 548e14cfd6ee03ebb66bcad13648529d4a17f4e4 (patch) | |
| tree | 269e92bce56a6d9f53468f4c485421c31d4c942d /host/tests/devtest/bitbang_test.py | |
| parent | 5efe1c0f124d1068bbc9bd882db5530ca2ca0377 (diff) | |
| download | uhd-548e14cfd6ee03ebb66bcad13648529d4a17f4e4.tar.gz uhd-548e14cfd6ee03ebb66bcad13648529d4a17f4e4.tar.bz2 uhd-548e14cfd6ee03ebb66bcad13648529d4a17f4e4.zip | |
GPIO: Set CTRL register before OUT register in GPIO example.
Diffstat (limited to 'host/tests/devtest/bitbang_test.py')
0 files changed, 0 insertions, 0 deletions