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authorJosh Blum <josh@joshknows.com>2011-07-03 10:38:24 -0700
committerJosh Blum <josh@joshknows.com>2011-07-03 10:38:24 -0700
commit2c833a175f7e6feaf07568bae278c6e4cafd6a10 (patch)
tree132965e1ffdb28a74eb15a5320edfb786bb909c1 /host/lib
parent9d63ff21342825a7e9ebcae648d039e397153e51 (diff)
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usrp2: restored fpga compat check, updated for major/minor scheme
Diffstat (limited to 'host/lib')
-rw-r--r--host/lib/usrp/usrp2/usrp2_impl.cpp20
1 files changed, 20 insertions, 0 deletions
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index 079506c70..a62e6088b 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -330,6 +330,26 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr){
));
_tree->create<std::string>(mb_path / "name").set(_mbc[mb].iface->get_cname());
+ //check the fpga compatibility number
+ const boost::uint32_t fpga_compat_num = _mbc[mb].iface->peek32(U2_REG_COMPAT_NUM_RB);
+ boost::uint16_t fpga_major = fpga_compat_num >> 16, fpga_minor = fpga_compat_num & 0xffff;
+ if (fpga_major == 0){ //old version scheme
+ fpga_major = fpga_minor;
+ fpga_minor = 0;
+ }
+ if (fpga_major != USRP2_FPGA_COMPAT_NUM){
+ throw uhd::runtime_error(str(boost::format(
+ "\nPlease update the firmware and FPGA images for your device.\n"
+ "See the application notes for USRP2/N-Series for instructions.\n"
+ "Expected FPGA compatibility number %d, but got %d:\n"
+ "The FPGA build is not compatible with the host code build."
+ ) % int(USRP2_FPGA_COMPAT_NUM) % fpga_major));
+ }
+ _tree->create<std::string>(mb_path / "fpga_version").set(str(boost::format("%u.%u") % fpga_major % fpga_minor));
+
+ //lock the device/motherboard to this process
+ _mbc[mb].iface->lock_device(true);
+
////////////////////////////////////////////////////////////////
// setup the mboard eeprom
////////////////////////////////////////////////////////////////